isl6336b Intersil Corporation, isl6336b Datasheet
isl6336b
Related parts for isl6336b
isl6336b Summary of contents
Page 1
... This improves regulation and protection accuracy. The threshold-sensitive enable input is available to accurately coordinate the start up of the ISL6336B with any other voltage rail. Dynamic-VID™ technology allows seamless on-the-fly VID changes. The offset pin allows accurate voltage offset settings that are independent of VID setting ...
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... ISL6336BCRZ* ISL6336B CRZ ISL6336BIRZ* ISL6336B IRZ *Add “-T” for tape and reel. Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. ...
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... Quad Output (Two Phase) NOTE: Intersil 5V and 12V drivers are mostly pin-to-pin compatible and allow for dual footprint layout implementation to optimize MOSFET selection and efficiency. Dual = One Synchronous Channel; Quad = Two Synchronous Channels. 3 ISL6336B COMMENTS DIODE GATE DRIVE # OF GATE EMULATION ...
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... ISL6336B Block Diagram VDIFF VR_RDY RGND x1 VSEN OVP SOFT-START +175mV FAULT LOGIC SS OFS OFFSET REF DAC VID7 VID6 VID5 DYNAMIC VID4 VID DAC VID3 VID2 VID1 VID0 COMP FB 1.12V OC2 IMON 1.12V 4 ISL6336B OVP H_CPURST_N PSI# APA OVP S R DRIVE Q CLOCK, ...
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... IMON ISEN5- ISEN5+ PWM3 ISEN3- ISEN3+ H_CPURST_N PWM6 ISEN6- VR_HOT ISEN6+ TM EN_PWR OFS FS TCOMP SS +5V +5V R OFS VIN NTC 5 ISL6336B +5V ISL6620 VCC BOOT UGATE PHASE EN PWM LGATE +5V GND +5V ISL6596 VCC BOOT UGATE PHASE EN PWM LGATE GND +5V ISL6596 VCC BOOT ...
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... ISEN4- ISEN4+ PWM5 ISEN5- ISEN5+ H_CPURST_N PWM6 ISEN6- VR_HOT ISEN6+ TM EN_PWR OFS FS TCOMP SS +5V +5V R OFS VIN +5V +5V NTC 6 ISL6336B +5V ISL6620 VCC BOOT UGATE PHASE EN PWM LGATE +5V GND +5V ISL6620 VCC BOOT UGATE PHASE EN PWM LGATE GND +5V ISL6596 VCC BOOT ...
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... Operating Conditions Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V ±5% Ambient Temperature ISL6336BCRZ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C ISL6336BIRZ . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. ...
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... LOW Signal Threshold (PSI# Lockout) CURRENT SENSE AND OVERCURRENT PROTECTION Sensed Current Tolerance Overcurrent Trip Level for Average Current (PSI Overcurrent Trip Level for Average Current (PSI ISL6336B TEST CONDITIONS Offset resistor connected to ground Voltage below VCC, offset resistor connected to VCC R = 100kΩ T (Note 100kΩ ...
Page 9
... During soft-start, VDAC rises from 0 to 1.1V first and then ramp to VID voltage after receiving valid VID input. 6. Soft-start ramp rate is determined by the adjustable soft-start oscillator frequency at the speed of 6.25mV per cycle. 9 ISL6336B TEST CONDITIONS With external pull-up resistor connected to VCC With 1.24kΩ resistor pull-up to VCC, I ...
Page 10
... The resistor and capacitor should be placed right next to the VCC pin to GND. GND - Bias and reference ground for the IC. The exposed metal pad on the bottom of the package of the ISL6336B is GND. EN_PWR - This pin is a threshold-sensitive enable input for the controller ...
Page 11
... input pin for VR temperature measurement. Connect this pin through NTC thermistor to GND and a resistor to VCC of the controller. The voltage at this pin is reverse proportional to the VR temperature. ISL6336B monitors the VR temperature based on the voltage at the TM pin and the output signal at VR_HOT. ...
Page 12
... With both APP and APA control, ISL6336B can achieve excellent transient performance and reduce the demand on the output capacitors. Under steady state conditions the operation of the ISL6336B PWM modulator appears to be that of a conventional trailing edge modulator. Conventional analysis and design methods can therefore be used for steady state and small signal operation ...
Page 13
... In the default 6-phase operation, the PWM2 pulse happens 1 cycle after PWM1, the PWM3 pulse happens 1 cycle after PWM2, etc. The ISL6336B works 6-phase configuration. Connecting the PWM6 pin to VCC selects 5-phase operation and the pulse times are spaced in 1/5 cycle increments. ...
Page 14
... R (kΩ) T FIGURE 3. SWITCHING FREQUENCY vs R Current Sensing The ISL6336B senses current continuously for fast response. The ISL6336B supports inductor DCR sensing, or resistor sensing techniques. The associated channel current sense amplifier uses the ISEN inputs to reproduce a signal proportional to the inductor current, I ...
Page 15
... DAC) and offset errors in the OFS current source, remote-sense and error amplifiers. Intersil specifies the guaranteed tolerance of the ISL6336B to include the combined tolerances of each of these elements. 15 ISL6336B The output of the error amplifier, V sawtooth waveforms to generate the PWM signals ...
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... ISL6336B VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 VOLTAGE OFF OFF 1.60000 1.59375 1.58750 ...
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... ISL6336B VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 VOLTAGE 1 1 1.11875 1.11250 1.10625 1.10000 1.09375 1.08750 ...
Page 18
... 0.50000 Output-Voltage Offset Programming 1 0 OFF The ISL6336B allows the designer to accurately adjust the 1 1 OFF offset voltage. When resistor, R OFS to VCC, the voltage across it is regulated to 1.6V. This causes a proportional current ( connected to ground, the voltage across it is OFS regulated to 0 ...
Page 19
... The ISL6336B features an enable input (EN_PWR) for power sequencing between the controller bias voltage and another voltage rail. The enable comparator holds the ISL6336B in shutdown until the voltage at EN_PWR rises above 0.875V. The enable comparator has about 130mV of hysteresis to prevent bounce important that the driver ICs reach their POR level before the ISL6336B becomes enabled ...
Page 20
... After remaining at 1.1V for some time, ISL6336B reads the VID code at VID input pins. If the VID code is valid, ISL6336B will regulate the output to the final VID setting. If the VID code is an OFF code, ISL6336B will shut down, and cycling VCC, EN_PWR or EN_VTT is needed to restart ...
Page 21
... MOSFETs. If the overvoltage condition reoccurs, the ISL6336B will again command the lower MOSFETs to turn on. The ISL6336B will continue to protect the load in this fashion as long as the overvoltage condition occurs. VR_RDY Once an overvoltage condition is detected, normal PWM operation ceases until the ISL6336B is reset ...
Page 22
... With a resistor from IMON AVG to GND, the voltage at IMON will be proportional to the sensed average current and the resistor value. The ISL6336B continually monitors the voltage at the IMON pin. If the voltage at the IMON pin is higher than 1.11V, a comparator trips and causes the converter to shutdown. ...
Page 23
... Integrated Temperature Compensation When the TCOMP voltage is equal to or greater than V ISL6336B will utilize the voltage at the TM and TCOMP pins to compensate the temperature impact on the sensed current. The block diagram of this function is shown in Figure 17. 100 ...
Page 24
... ISL6336B converts the TM pin CC voltage to a 6-bit digital signal for temperature compensation. With the non-linear A/D converter of ISL6336B, the TM digital signal is linearly proportional to the NTC temperature. For accurate temperature compensation, the ratio of the TM voltage to the NTC temperature of the practical design should be similar to that in Figure 15 ...
Page 25
... M D(ON) dead times, t and the beginning and the end of the D1 D2 lower-MOSFET conduction interval respectively. 25 ISL6336B P LOW 2 Thus, the total maximum power dissipated in each lower MOSFET is approximated by the summation LOW,2 UPPER MOSFET POWER CALCULATION In addition to r MOSFET losses are due to currents conducted across the ...
Page 26
... R two or more times to achieve optimal thermal balance between all channels. Load-Line Regulation Resistor The load-line regulation resistor is labelled R Its value depends on the desired loadline requirement of the application. 26 ISL6336B The desired loadline can be calculated by Equation 34 where I and VR (EQ. 32) load condition ...
Page 27
... L-C resonant frequency and a zero at the ESR frequency. A type III controller, as shown in Figure 20, provides the 0 necessary compensation FIGURE 20. COMPENSATION CIRCUIT FOR ISL6336B BASED (EQ. 37) IN The first step is to choose the desired bandwidth compensated system ...
Page 28
... The capacitors selected must have sufficiently low ESL and ESR so that the total output voltage deviation is less than the allowable maximum. Neglecting the contribution of inductor current and regulator 28 ISL6336B response, the output voltage initially deviates by an amount, as shown in Equation 39: ΔV ≈ ...
Page 29
... DUTY CYCLE (V O/ FIGURE 22. NORMALIZED INPUT-CAPACITOR RMS CURRENT vs DUTY CYCLE FOR 3-PHASE CONVERTER 29 ISL6336B . T FIGURE 23. NORMALIZED INPUT-CAPACITOR RMS CURRENT For a 2-phase design, use Figure 21 to determine the input- capacitor RMS current requirement given the duty cycle, maximum sustained output current (I per-phase peak-to-peak inductor current (I ...
Page 30
... Locate the output capacitors between the inductors and the load, while keeping them in close proximity to the microprocessor socket. The ISL6336B can be placed off to one side or centered relative to the individual phase switching components. Routing of sense lines and PWM signals will guide final placement ...
Page 31
... L48.7x7 48 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 4, 10/06 7.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW ( TYP ) ( TYPICAL RECOMMENDED LAND PATTERN 31 ISL6336B 4X 5.5 A 44X 0. 48X 0 . 40± BOTTOM VIEW ± SIDE VIEW ( 44X REF C ( 48X 0 ...