PIC18F44J50-I/ML Microchip Technology, PIC18F44J50-I/ML Datasheet - Page 458
![IC PIC MCU FLASH 16K 2V 44-QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC18F44J50-I/ML
Manufacturer Part Number
PIC18F44J50-I/ML
Description
IC PIC MCU FLASH 16K 2V 44-QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18LF24J10-ISS.pdf
(32 pages)
2.PIC18LF24J50-ISS.pdf
(554 pages)
3.PIC18LF24J50-ISS.pdf
(12 pages)
4.PIC18F24J50-ISS.pdf
(18 pages)
5.PIC18F26J11-ISO.pdf
(28 pages)
Specifications of PIC18F44J50-I/ML
Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
44-QFN
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
34
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3776 B
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183022, DM183032, DV164136, MA180024
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC18LF24J10-ISS PDF datasheet
- PIC18LF24J50-ISS PDF datasheet #2
- PIC18LF24J50-ISS PDF datasheet #3
- PIC18F24J50-ISS PDF datasheet #4
- PIC18F26J11-ISO PDF datasheet #5
- Current page: 458 of 554
- Download datasheet (9Mb)
PIC18F46J50 FAMILY
MULLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
DS39931C-page 458
Q Cycle Activity:
Before Instruction
After Instruction
Decode
W
PRODH
PRODL
W
PRODH
PRODL
Q1
literal ‘k’
Multiply Literal with W
MULLW
0 ≤ k ≤ 255
(W) x k → PRODH:PRODL
None
An unsigned multiplication is carried
out between the contents of W and the
8-bit literal ‘k’. The 16-bit result is
placed in PRODH:PRODL register pair.
PRODH contains the high byte.
W is unchanged.
None of the Status flags are affected.
Note that neither Overflow nor Carry is
possible in this operation. A Zero result
is possible but not detected.
1
1
MULLW
Read
0000
Q2
=
=
=
=
=
=
E2h
?
?
E2h
ADh
08h
k
0C4h
1101
Process
Data
Q3
kkkk
PRODH:
registers
PRODL
Write
Q4
kkkk
MULWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
W
REG
PRODH
PRODL
W
REG
PRODH
PRODL
Q1
Multiply W with f
MULWF
0 ≤ f ≤ 255
a ∈ [0,1]
(W) x (f) → PRODH:PRODL
None
An unsigned multiplication is carried out
between the contents of W and the
register file location ‘f’. The 16-bit result is
stored in the PRODH:PRODL register
pair. PRODH contains the high byte. Both
W and ‘f’ are unchanged.
None of the Status flags are affected.
Note that neither Overflow nor Carry is
possible in this operation. A Zero result is
possible but not detected.
If ‘a’ is ‘0’, the Access Bank is selected. If
‘a’ is ‘1’, the BSR is used to select the
GPR bank (default).
If ‘a’ is ‘0’ and the extended instruction set
is enabled, this instruction operates in
Indexed Literal Offset Addressing mode
whenever f ≤ 95 (5Fh). See
Section 27.2.3 “Byte-Oriented and
Bit-Oriented Instructions in Indexed
Literal Offset Mode” for details.
1
1
register ‘f’
0000
MULWF
Read
Q2
=
=
=
=
=
=
=
=
© 2009 Microchip Technology Inc.
f {,a}
C4h
B5h
?
?
C4h
B5h
8Ah
94h
001a
REG, 1
Process
Data
Q3
ffff
registers
PRODH:
PRODL
Write
Q4
ffff
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