PIC16F88-I/SO Microchip Technology, PIC16F88-I/SO Datasheet - Page 101

IC MCU FLASH 4KX14 EEPROM 18SOIC

PIC16F88-I/SO

Manufacturer Part Number
PIC16F88-I/SO
Description
IC MCU FLASH 4KX14 EEPROM 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F88-I/SO

Program Memory Type
FLASH
Program Memory Size
7KB (4K x 14)
Package / Case
18-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
SSP/USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014
Minimum Operating Temperature
- 40 C
On-chip Adc
7-ch x 10-bit
Data Rom Size
256 B
A/d Bit Size
10 bit
A/d Channels Available
7
Height
2.31 mm
Length
11.53 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4 V
Width
7.49 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA12XP080 - ADAPTER DEVICE FOR MPLAB-ICEAC164010 - MODULE SKT PROMATEII DIP/SOIC
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F88-I/SO
Manufacturer:
ROHM
Quantity:
15 000
Part Number:
PIC16F88-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
PIC16F88-I/SO
0
11.1
The BRG supports both the Asynchronous and
Synchronous modes of the AUSART. It is a dedicated
8-bit Baud Rate Generator. The SPBRG register
controls the period of a free running 8-bit timer. In Asyn-
chronous mode, bit BRGH (TXSTA<2>) also controls
the baud rate. In Synchronous mode, bit BRGH is
ignored. Table 11-1 shows the formula for computation
of the baud rate for different AUSART modes which
only apply in Master mode (internal clock).
Given the desired baud rate and F
integer value for the SPBRG register can be calculated
using the formula in Table 11-1. From this, the error in
baud rate can be determined.
It may be advantageous to use the high baud rate
(BRGH = 1) even for slower baud clocks. This is
because the F
baud rate error in some cases.
Writing a new value to the SPBRG register causes the
BRG timer to be reset (or cleared). This ensures the
BRG does not wait for a timer overflow before
outputting the new baud rate.
TABLE 11-1:
TABLE 11-2:
 2005 Microchip Technology Inc.
Legend: X = value in SPBRG (0 to 255)
98h
18h
99h
Legend:
Address
SYNC
0
1
AUSART Baud Rate Generator
(BRG)
x = unknown, - = unimplemented, read as ‘0’. Shaded cells are not used by the BRG.
TXSTA
RCSTA
SPBRG
Name
OSC
(Asynchronous) Baud Rate = F
(Synchronous) Baud Rate = F
/(16(X + 1)) equation can reduce the
BAUD RATE FORMULA
REGISTERS ASSOCIATED WITH BAUD RATE GENERATOR
Baud Rate Generator Register
CSRC
SPEN
Bit 7
BRGH = 0 (Low Speed)
Bit 6
RX9
TX9
OSC
SREN
TXEN
Bit 5
, the nearest
OSC
OSC
CREN
SYNC
Bit 4
/(64(X + 1))
/(4(X + 1))
ADDEN
Bit 3
11.1.1
The PIC16F87/88 has an 8 MHz INTRC that can be
used as the system clock, thereby eliminating the need
for external components to provide the clock source.
When the INTRC provides the system clock, the
AUSART module will also use the INTRC as its system
clock.
frequencies that can be used to generate the AUSART
module’s baud rate.
11.1.2
The system clock is used to generate the desired baud
rate; however, when a low-power mode is entered, the
low-power clock source may be operating at a different
frequency than in full power execution. In Sleep mode,
no clocks are present. This may require the value in
SPBRG to be adjusted.
11.1.3
The data on the RB2/SDO/RX/DT pin is sampled three
times by a majority detect circuit to determine if a high
or a low level is present at the RX pin.
BRGH
FERR
Bit 2
Table 11-1 shows
AUSART AND INTRC OPERATION
LOW-POWER MODE OPERATION
SAMPLING
OERR
TRMT
Baud Rate = F
Bit 1
BRGH = 1 (High Speed)
RX9D
TX9D
PIC16F87/88
Bit 0
N/A
OSC
0000 -010
0000 000x
0000 0000
POR, BOR
some
Value on:
/(16(X + 1))
DS30487C-page 99
of
the INTRC
0000 -010
0000 000x
0000 0000
Value on
all other
Resets

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