PIC18F27J53-I/SP Microchip Technology, PIC18F27J53-I/SP Datasheet - Page 207

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PIC18F27J53-I/SP

Manufacturer Part Number
PIC18F27J53-I/SP
Description
IC PIC MCU 128KB FLASH 28SPDIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F27J53-I/SP

Program Memory Type
FLASH
Program Memory Size
128KB (64K x 16)
Package / Case
*
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.8 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
16
Number Of Timers
8
Operating Supply Voltage
2.15 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Controller Family/series
PIC18
Cpu Speed
48MHz
Embedded Interface Type
I2C, SPI, USART
Digital Ic Case Style
DIP
Supply Voltage Range
1.8V To 5.5V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F27J53-I/SP
Manufacturer:
MITSUBISHI
Quantity:
12
15.0
15.1
The Master Synchronous Serial Port (MSSPx) module
is a serial interface useful for communicating with other
peripheral or microcontroller devices. These peripheral
devices may be Serial EEPROMs, shift registers,
display drivers, A/D converters, etc. The MSSPx
module can operate in one of two modes:
• Serial Peripheral Interface (SPI)
• Inter-Integrated Circuit (I
FIGURE 15-1:
 2010 Microchip Technology Inc.
MASTER SYNCHRONOUS
SERIAL PORT (MSSP1 AND
MSSP2) MODULE
Master SSPx (MSSPx) Module
Overview
MSSPx BLOCK DIAGRAM (SPI MODE)
2
C™)
SCKx
SDOx
SDIx
SSx
Read
SSx Control
TRIS bit
bit 0
Enable
Select
Select
Edge
Edge
Preliminary
SSPxBUF Reg
SSPxSR Reg
SSPxM<3:0>
4
The SPI interface supports the following modes and
features:
• Master mode
• Slave mode
• Clock Parity
• Slave Select Synchronization (Slave mode only)
• Daisy chain connection of slave devices
Figure 15-1
module.
Clock
Shift
Write
PIC18(L)F2X/4XK22
(
Prescaler
Data Bus
4, 16, 64
TMR2 Output
Baud Rate
Generator
(SSPxADD)
2 (CKP, CKE)
2
Clock Select
is a block diagram of the SPI interface
T
OSC
)
DS41412D-page 207

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