PIC18LF2420-I/ML Microchip Technology, PIC18LF2420-I/ML Datasheet - Page 123

• Manufacturer Part Number: PIC18LF2420-I/ML
• Description: IC PIC MCU FLASH 8KX16 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF2420-I/ML

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC18
• No. Of I/o's: 25
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Package: 28QFN EP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 25
• Interface Type: I2C/SPI/USART
• On-chip Adc: 10-chx10-bit
• Number Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

FIGURE 10-3:
FIGURE 10-4:
TABLE 10-11: REGISTERS ASSOCIATED WITH PARALLEL SLAVE PORT
© 2008 Microchip Technology Inc.
PORTD
LATD
TRISD
PORTE
LATE
TRISE
INTCON
PIR1
PIE1
IPR1
ADCON1
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Parallel Slave Port.
Name
PORTD<7:0>
PORTD<7:0>
PSPIF
PSPIF
PORTD Data Latch Register (Read and Write to Data Latch)
PORTD Data Direction Register
GIE/GIEH PEIE/GIEL
OBF
OBF
CS
WR
RD
IBF
CS
WR
RD
IBF
PSPIE
PSPIP
PSPIF
Bit 7
RD7
IBF
—
—
—
PARALLEL SLAVE PORT WRITE WAVEFORMS
PARALLEL SLAVE PORT READ WAVEFORMS
Q1
Q1
ADIF
ADIE
ADIP
Bit 6
RD6
OBF
—
—
—
Q2
Q2
TMR0IF
VCFG1
IBOV
RCIE
RCIP
RCIF
Bit 5
RD5
Q3
Q3
—
—
PIC18F2420/2520/4420/4520
Q4
Q4
PSPMODE
VCFG0
INT0IE
TXIE
TXIP
Bit 4
TXIF
RD4
—
—
Q1
Q1
PCFG3
Q2
SSPIF
SSPIE
SSPIP
Q2
RBIE
Bit 3
RD3
RE3
—
—
Q3
Q3
LATE Data Latch Register
TMR0IF
CCP1IF
CCP1IE
CCP1IP
TRISE2
PCFG2
Bit 2
RD2
RE2
Q4
Q4
TMR2IE
TMR2IP
TMR2IF
TRISE1
PCFG1
Q1
INT0IF
Q1
Bit 1
RD1
RE1
Q2
Q2
TMR1IF
TMR1IE
TMR1IP
TRISE0
PCFG0
RBIF
Bit 0
DS39631E-page 121
RD0
RE0
Q3
Q3
on page
Values
Q4
Reset
Q4
52
52
52
52
52
52
49
51
52
52
52