PIC18LF2420-I/ML Microchip Technology, PIC18LF2420-I/ML Datasheet - Page 401

• Manufacturer Part Number: PIC18LF2420-I/ML
• Description: IC PIC MCU FLASH 8KX16 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF2420-I/ML

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC18
• No. Of I/o's: 25
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Package: 28QFN EP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 25
• Interface Type: I2C/SPI/USART
• On-chip Adc: 10-chx10-bit
• Number Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DC Characteristics ............................................................335
DCFSNZ............................................................................287
DECF.................................................................................286
DECFSZ ............................................................................287
Development Support........................................................317
Device Differences ............................................................395
Device Overview ...................................................................7
Device Reset Timers ...........................................................45
Direct Addressing ................................................................69
E
Effect on Standard PIC MCU Instructions .........................314
Effects of Power-Managed Modes on
Electrical Characteristics ...................................................321
Enhanced Capture/Compare/PWM (ECCP) .....................147
Enhanced PWM Mode. See PWM (ECCP Module).
Enhanced Universal Synchronous Asynchronous
Equations
Errata.....................................................................................6
EUSART
DS39631E-page 399
Power-Down and Supply Current..............................325
Supply Voltage ..........................................................324
Details on Individual Family Members ..........................8
Features (table).............................................................9
New Core Features .......................................................7
Other Special Features .................................................8
Oscillator Start-up Timer (OST) ..................................45
PLL Lock Time-out ......................................................45
Power-up Timer (PWRT).............................................45
Time-out Sequence .....................................................45
Various Clock Sources................................................31
Associated Registers ................................................160
Capture and Compare Modes...................................148
Capture Mode. See Capture (ECCP Module).
Outputs and Configuration ........................................148
Pin Configurations for ECCP.....................................148
PWM Mode. See PWM (ECCP Module).
Standard PWM Mode................................................148
Timer Resources.......................................................148
Receiver Transmitter (EUSART). See EUSART.
A/D Acquisition Time .................................................228
A/D Minimum Charging Time ....................................228
Calculating the Minimum Required
Asynchronous Mode .................................................211
Baud Rate Generator
Baud Rate Generator (BRG) .....................................205
Acquisition Time................................................228
12-Bit Break Transmit and Receive ..................216
Associated Registers, Receive .........................214
Associated Registers, Transmit ........................212
Auto-Wake-up on Sync Break...........................214
Receiver ............................................................213
Setting up 9-Bit Mode with
Transmitter ........................................................211
Operation in Power-Managed Mode .................205
Associated Registers ........................................206
Auto-Baud Rate Detect .....................................209
Baud Rate Error, Calculating ............................206
Baud Rates, Asynchronous Modes...................207
High Baud Rate Select (BRGH Bit)...................205
Sampling ...........................................................205
Address Detect .........................................213
PIC18F2420/2520/4420/4520
Extended Instruction Set
External Clock Input............................................................ 24
F
Fail-Safe Clock Monitor............................................. 249, 261
Fast Register Stack............................................................. 56
Firmware Instructions........................................................ 267
Flash Program Memory ...................................................... 73
FSCM. See Fail-Safe Clock Monitor.
G
General Call Address Support .......................................... 184
GOTO ............................................................................... 288
H
Hardware Multiplier ............................................................. 89
Synchronous Master Mode ....................................... 217
Synchronous Slave Mode ......................................... 220
ADDFSR ................................................................... 310
ADDULNK................................................................. 310
and Using MPLAB IDE Tools.................................... 316
CALLW ..................................................................... 311
Considerations for Use ............................................. 314
MOVSF ..................................................................... 311
MOVSS..................................................................... 312
PUSHL ...................................................................... 312
SUBFSR ................................................................... 313
SUBULNK................................................................. 313
Syntax....................................................................... 309
Exiting Operation ...................................................... 261
Interrupts in Power-Managed Modes........................ 262
POR or Wake from Sleep ......................................... 262
WDT During Oscillator Failure .................................. 261
Associated Registers .................................................. 81
Control Registers ........................................................ 74
Erase Sequence ......................................................... 78
Erasing........................................................................ 78
Operation During Code-Protect .................................. 81
Reading ...................................................................... 77
Table Pointer
Table Pointer Boundaries ........................................... 76
Table Reads and Table Writes ................................... 73
Write Sequence .......................................................... 79
Writing To ................................................................... 79
Introduction ................................................................. 89
Operation .................................................................... 89
Performance Comparison ........................................... 89
Associated Registers, Receive ......................... 219
Associated Registers, Transmit ........................ 218
Reception.......................................................... 219
Transmission .................................................... 217
Associated Registers, Receive ......................... 221
Associated Registers, Transmit ........................ 220
Reception.......................................................... 221
Transmission .................................................... 220
EECON1 and EECON2 ...................................... 74
TABLAT (Table Latch) Register.......................... 76
TBLPTR (Table Pointer) Register....................... 76
Boundaries Based on Operation......................... 76
Protection Against Spurious Writes .................... 81
Unexpected Termination..................................... 81
Write Verify ......................................................... 81
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