PIC18F2610-I/SO Microchip Technology, PIC18F2610-I/SO Datasheet - Page 370
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PIC18F2610-I/SO
Manufacturer Part Number
PIC18F2610-I/SO
Description
IC MCU FLASH 32KX16 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2221-ISO.pdf
(46 pages)
3.PIC18LF2410-ISO.pdf
(376 pages)
4.PIC18LF2410-ISO.pdf
(8 pages)
5.PIC18F2515-ISO.pdf
(16 pages)
6.PIC18F2515-ISO.pdf
(6 pages)
7.PIC18F2515-ISO.pdf
(8 pages)
8.PIC18F4510-IPT.pdf
(380 pages)
Specifications of PIC18F2610-I/SO
Program Memory Type
FLASH
Program Memory Size
64KB (32K x 16)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3968 B
Interface Type
CCP/ECCP/EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Operating Supply Voltage
4.2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10-ch x 10-bit
Package
28SOIC W
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Height
2.31 mm
Length
17.87 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.2 V
Width
7.49 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2610-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18F2X1X/4X1X
ID Locations ............................................................. 237, 255
INCF ................................................................................. 278
INCFSZ ............................................................................ 279
In-Circuit Debugger .......................................................... 255
In-Circuit Serial Programming (ICSP) ...................... 237, 255
Indexed Literal Offset Addressing
Indexed Literal Offset Mode ....................................... 71, 304
Indirect Addressing ............................................................ 70
INFSNZ ............................................................................ 279
Initialization Conditions for all Registers ...................... 49–52
Instruction Cycle ................................................................. 57
Instruction Flow/Pipelining ................................................. 57
Instruction Set
DS39636A-page 368
Clock Synchronization and the
Effects of a Reset ..................................................... 185
General Call Address Support ................................. 174
I
Master Mode ............................................................ 175
Multi-Master Communication, Bus Collision
Multi-Master Mode ................................................... 185
Operation ................................................................. 164
Read/Write Bit Information (R/W Bit) ............... 164, 165
Registers .................................................................. 160
Serial Clock (RC3/SCK/SCL) ................................... 165
Slave Mode .............................................................. 164
Sleep Operation ....................................................... 185
Stop Condition Timing .............................................. 184
and Standard PIC18 Instructions ............................. 304
Clocking Scheme ....................................................... 57
ADDLW .................................................................... 263
ADDWF .................................................................... 263
ADDWF (Indexed Literal Offset mode) .................... 305
ADDWFC ................................................................. 264
ANDLW .................................................................... 264
ANDWF .................................................................... 265
BC ............................................................................ 265
BCF .......................................................................... 266
BN ............................................................................ 266
BNC ......................................................................... 267
BNN ......................................................................... 267
BNOV ....................................................................... 268
BNZ .......................................................................... 268
BOV ......................................................................... 271
BRA .......................................................................... 269
BSF .......................................................................... 269
BSF (Indexed Literal Offset mode) .......................... 305
BTFSC ..................................................................... 270
BTFSS ..................................................................... 270
BTG .......................................................................... 271
BZ ............................................................................ 272
CALL ........................................................................ 272
CLRF ........................................................................ 273
CLRWDT .................................................................. 273
2
C Clock Rate w/BRG ............................................. 177
CKP bit (SEN = 1) ............................................ 171
Operation ......................................................... 176
Reception ......................................................... 181
Repeated Start Timing ..................................... 180
Start Condition Timing ..................................... 179
Transmission .................................................... 181
and Arbitration .................................................. 185
Addressing ....................................................... 164
Reception ......................................................... 165
Transmission .................................................... 165
Preliminary
INTCON Registers ....................................................... 83–85
Inter-Integrated Circuit. See I
Internal Oscillator Block ..................................................... 26
Internal RC Oscillator
COMF ...................................................................... 274
CPFSEQ .................................................................. 274
CPFSGT .................................................................. 275
CPFSLT ................................................................... 275
DAW ........................................................................ 276
DCFSNZ .................................................................. 277
DECF ....................................................................... 276
DECFSZ .................................................................. 277
Firmware Instructions .............................................. 257
General Format ........................................................ 259
GOTO ...................................................................... 278
INCF ........................................................................ 278
INCFSZ .................................................................... 279
INFSNZ .................................................................... 279
IORLW ..................................................................... 280
IORWF ..................................................................... 280
LFSR ....................................................................... 281
MOVF ...................................................................... 281
MOVFF .................................................................... 282
MOVLB .................................................................... 282
MOVLW ................................................................... 283
MOVWF ................................................................... 283
MULLW .................................................................... 284
MULWF .................................................................... 284
NEGF ....................................................................... 285
NOP ......................................................................... 285
Opcode Field Descriptions ....................................... 258
POP ......................................................................... 286
PUSH ....................................................................... 286
RCALL ..................................................................... 287
RESET ..................................................................... 287
RETFIE .................................................................... 288
RETLW .................................................................... 288
RETURN .................................................................. 289
RLCF ....................................................................... 289
RLNCF ..................................................................... 290
RRCF ....................................................................... 290
RRNCF .................................................................... 291
SETF ....................................................................... 291
SETF (Indexed Literal Offset mode) ........................ 305
SLEEP ..................................................................... 292
Standard Instructions ............................................... 257
SUBFWB ................................................................. 292
SUBLW .................................................................... 293
SUBWF .................................................................... 293
SUBWFB ................................................................. 294
SWAPF .................................................................... 294
TBLRD ..................................................................... 295
TBLWT .................................................................... 296
TSTFSZ ................................................................... 297
XORLW ................................................................... 297
XORWF ................................................................... 298
Adjustment ................................................................. 26
INTIO Modes ............................................................. 26
INTOSC Frequency Drift ............................................ 26
INTOSC Output Frequency ....................................... 26
OSCTUNE Register ................................................... 26
PLL in INTOSC Modes .............................................. 26
Use with WDT .......................................................... 246
2004 Microchip Technology Inc.
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