PIC16F876-20I/SO Microchip Technology, PIC16F876-20I/SO Datasheet - Page 231

• Manufacturer Part Number: PIC16F876-20I/SO
• Description: IC MCU FLASH 8KX14 EE 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F876-20I/SO

• Core Size: 8-Bit
• Program Memory Size: 14KB (8K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Controller Family/series: PIC16F
• No. Of I/o's: 22
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 368Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 368 B
• Interface Type: MSSP, PSP, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 5 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL309-1073 - ADAPTER 28-SOIC TO 28-SOIC309-1024 - ADAPTER 28-SOIC TO 28-DIP309-1023 - ADAPTER 28-SOIC TO 28-DIP
• Lead Free Status / Rohs Status: Details

15.3.5
SS
SCK (CKP = 0,
SCK (CKP = 1,
Write to
SSPBUF
SDO
SDI
(SMP = 0)
Input
Sample (SMP = 0)
optional
SSPIF
SSPSR to
SSPBUF
1997 Microchip Technology Inc.
CKE = 0)
CKE = 0)
Slave Operation
In slave mode, the data is transmitted and received as the external clock pulses appear on SCK.
When the last bit is latched, the interrupt flag bit SSPIF is set.
The clock polarity is selected by appropriately programming bit CKP (SSPCON<4>). This then
would give waveforms for SPI communication as shown in
Figure 15-5
the minimum high and low times.
In sleep mode, the slave can transmit and receive data. When a byte is received, the device will
wake-up from sleep, if the interrupt is enabled.
Figure 15-4:
bit7
bit7
where the MSb is transmitted first. When in slave mode the external clock must meet
SPI Mode Waveform (Slave Mode With CKE = 0)
bit6
bit5
bit4
bit3
Section 15. SSP
bit2
Figure
bit1
15-3,
bit0
DS31015A-page 15-11
bit0
Figure
Next Q4 Cycle
after Q2
15-4, and
15