Z16F2811AL20SG Zilog, Z16F2811AL20SG Datasheet - Page 123

• Manufacturer Part Number: Z16F2811AL20SG
• Description: IC ZNEO MCU FLASH 128K 100LQFP
• Manufacturer: Zilog
• Series: Encore!® ZNEOr

Specifications of Z16F2811AL20SG

• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-LQFP
• Processor Series: Z16F2x
• Core: Zneo
• Data Bus Width: 16 bit
• Data Ram Size: 4 B
• Interface Type: ESPI, I2C, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 76
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: Z16F2800100ZCOG
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 770-1003 - ISP 4PORT FOR ZILOG ZNEO MCU269-4537 - DEV KIT FOR Z16F ZNEO
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4533

Table 60. Timer 0-2 PWM High Byte Register (TxPWMH)
Table 61. Timer 0-2 PWM Low Byte Register (TxPWML)
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
PS022008-0810
Timer 0-2 PWM High and Low Byte Registers
Timer 0-2 Control Registers
7
7
The timer 0-2 PWM high and low byte (TxPWMH and TxPWML) registers
Table 61
counter values for the CAPTURE modes.
PWMH and PWML—Pulse-width modulator High and Low Bytes
These two bytes, {PWMH[7:0], PWML[7:0]}, form a 16-bit value which is compared to
the current 16-bit timer count. When a match occurs, the PWM output changes state. The
PWM output value is set by the TPOL bit in the timer control 1 register (TxCTL1).
The TxPWMH and TxPWML registers also store the 16-bit captured timer value when
operating in CAPTURE or CAPTURE/COMPARE modes.
Timer 0-2 Control 0 Register
The timer 0-2 control 0 (TxCTL0) register together with timer 0-2 control 1 (TxCTL1)
register determines the timer configuration and operation.
on page 108) define PWM operations. These registers also store the timer
6
6
5
5
FF-E304H, FF-E314H, FF-E324H
FF-E305H, FF-E315H, FF-E315H
P R E L I M I N A R Y
4
4
PWMH
PWML
R/W
R/W
00H
00H
3
3
2
2
Product Specification
ZNEO
1
1
(Table 60
Z16F Series
Timers
0
0
and
108