MC9S12C32CFUE16 Freescale Semiconductor, MC9S12C32CFUE16 Datasheet - Page 138

• Manufacturer Part Number: MC9S12C32CFUE16
• Description: IC MCU 32K FLASH 16MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12C32CFUE16

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Processor Series: S12C
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: CAN/SCI/SPI
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 8
• Operating Supply Voltage: - 0.3 V to + 6.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68EVB912C32EE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• For Use With: CML12C32SLK - KIT STUDENT LEARNING 16BIT HCS12
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chapter 4 Multiplexed External Bus Interface (MEBIV3)
4.3.2.5
138
Module Base + 0x0004
Starting address location affected by INITRG register setting.
Module Base + 0x0005
Starting address location affected by INITRG register setting.
Module Base + 0x0006
Starting address location affected by INITRG register setting.
Module Base + 0x0007
Starting address location affected by INITRG register setting.
Reset
Reset
Reset
Reset
W
W
W
W
R
R
R
R
Reserved Registers
0
0
0
0
0
0
0
0
7
7
7
7
= Unimplemented or Reserved
= Unimplemented or Reserved
= Unimplemented or Reserved
= Unimplemented or Reserved
0
0
0
0
0
0
0
0
6
6
6
6
MC9S12C-Family / MC9S12GC-Family
Figure 4-6. Reserved Register
Figure 4-7. Reserved Register
Figure 4-8. Reserved Register
Figure 4-9. Reserved Register
0
0
0
0
0
0
0
0
5
5
5
5
Rev 01.24
0
0
0
0
0
0
0
0
4
4
4
4
0
0
0
0
0
0
0
0
3
3
3
3
0
0
0
0
0
0
0
0
2
2
2
2
Freescale Semiconductor
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0