MC9S12C32CFUE16 Freescale Semiconductor, MC9S12C32CFUE16 Datasheet - Page 457

• Manufacturer Part Number: MC9S12C32CFUE16
• Description: IC MCU 32K FLASH 16MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12C32CFUE16

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Processor Series: S12C
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: CAN/SCI/SPI
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 8
• Operating Supply Voltage: - 0.3 V to + 6.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68EVB912C32EE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• For Use With: CML12C32SLK - KIT STUDENT LEARNING 16BIT HCS12
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

15.3.2.17 Pulse Accumulators Count Registers (PACNT)
Read: Anytime
Write: Anytime
These registers contain the number of active input edges on its input pin since the last reset.
When PACNT overflows from 0xFFFF to 0x0000, the Interrupt flag PAOVF in PAFLG (0x0021) is set.
Full count register access should take place in one clock cycle. A separate read/write for high byte and low
byte will give a different result than accessing them as a word.
15.4
This section provides a complete functional description of the timer TIM16B8CV1 block. Please refer to
the detailed timer block diagram in
Freescale Semiconductor
Module Base + 0x0022
Module Base + 0x0023
Reset
Reset
W
W
R
R
Functional Description
PACNT15
PACNT7
15
0
0
7
edge on the pulse accumulator input pin may miss the last count because the
input has to be synchronized with the bus clock first.
Reading the pulse accumulator counter registers immediately after an active
Figure 15-26. Pulse Accumulator Count Register High (PACNTH)
Figure 15-27. Pulse Accumulator Count Register Low (PACNTL)
PACNT14
PACNT6
14
0
0
6
PACNT13
PACNT5
Figure 15-28
MC9S12C-Family / MC9S12GC-Family
13
0
0
5
PACNT12
PACNT4
Rev 01.24
NOTE
as necessary.
12
0
0
4
PACNT11
Chapter 15 Timer Module (TIM16B8CV1) Block Description
PACNT3
11
0
0
3
PACNT10
PACNT2
10
0
0
2
PACNT9
PACNT1
0
0
9
1
PACNT8
PACNT0
0
0
0
0
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