C8051F060-GQ Silicon Laboratories Inc, C8051F060-GQ Datasheet - Page 22

• Manufacturer Part Number: C8051F060-GQ
• Description: IC 8051 MCU 64K FLASH 100TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F06xr

Specifications of C8051F060-GQ

• Program Memory Type: FLASH
• Program Memory Size: 64KB (64K x 8)
• Package / Case: 100-TQFP, 100-VQFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 59
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 2x16b, 8x10b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F0x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 4.25 KB
• Interface Type: CAN/I2C/SMBus/SPI/UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 59
• Number Of Timers: 5
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F060DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 2-ch x 12-bit
• No. Of I/o's: 59
• Ram Memory Size: 4352Byte
• Cpu Speed: 25MHz
• No. Of Timers: 5
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1214 - DEV KIT FOR F060/F062/F063
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1213

C8051F060/1/2/3/4/5/6/7
22
VRGND0
CNVSTR
CNVSTR
MONEN
XTAL1
XTAL2
VREF0
AIN0G
VBGAP
VREF1
VRGND
AIN1G
VBGAP
/RST
DGND
DGND
DGND
AGND
VREF
DAC0
DAC1
AVDD
AGND
AGND
AIN0
AGND
AIN1
VDD
VDD
VDD
AV+
TCK
TMS
TDI
TDO
AV+
AV+
0
0
1
1
1
VDD Monitor
Digital Power
External Oscillator
Trimmed Internal
Oscillator
Circuit
JTAG
Logic
(12-Bit)
Analog Power
VREF
DAC0
(16-Bit)
(16-Bit)
1Msps
1Msps
ADC0
ADC1
Boundary Scan
WDT
Debug HW
VREF2
Figure 1.2. C8051F061 / C8051F063 Block Diagram
System Clock
A
D
C
0
D
A
T
A
A
D
C
1
D
A
T
A
Reset

+
-
C
o
8
0
5
1
e
r
External Data Memory Bus
D
F
F
I
Interface
4kbyte RAM
DMA
CANRAM
256 byte
64kbyte
FLASH
32X136
RAM
SFR Bus
Rev. 1.2
Control
EMIF
Timers 0, 1,
P3 Latches
P0, P1, P2,
SPI Bus
UART0
UART1
SMBus
CAN
2.0B
2,3,4
PCA
ADC2
200ksps
(10-Bit)
CP2
Data Latch
CP1
C
R
O
S
S
B
A
R
Ctrl Latch
Addr[15:8]
P4 Latch
P5 Latch
P6 Latch
Addr[7:0]
P7 Latch
CP0
A
M
U
X
+
-
+
-
Drv
Drv
Drv
Drv
P0
P1
P2
P3
Sensor
+
-
Temp
DRV
DRV
DRV
DRV
P2.6
P2.7
P2.2
P2.3
P2.4
P2.5
P4
P5
P6
P7
P1.0/
AIN2.0
P1.7/
AIN2.7
P0.0
P0.7
P2.0
P2.7
CANTX
CANRX
VREF2