EP9312-IBZ Cirrus Logic Inc, EP9312-IBZ Datasheet - Page 617

• Manufacturer Part Number: EP9312-IBZ
• Description: IC ARM920T MCU 200MHZ 352-PBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9312-IBZ

• Core Size: 16/32-Bit
• Package / Case: 352-BGA
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Controller Family/series: (ARM9)
• A/d Converter: 12 Bits
• No. Of I/o Pins: 65
• Clock Frequency: 200MHz
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1260

DS785UM1
17.5.4 IrDA Integration Information
17.5.4.1 Enabling Infrared Modes
17.5.4.2 Clocking Requirements
There are four clocks, PCLK, MIRCLK, FIRCLK, and UARTCLK.
Version 1.1 of the Infrared Data Association standard indicates the following:
The worst case ratio that can be supported for PCLK:FIRCLK is a ratio of 1:5. The maximum
that PCLK can be is 66 MHz, therefore:
Any frequencies outside the above range are not supported and will result in incorrect
behavior of the FIR mode of the infrared peripheral.
Since MIRCLK is 18.432 MHz, PCLK can be as low as 3.68 MHz and as high as 66 MHz. Any
PCLK frequency in this range is allowable. Any PCLK frequencies outside the range are not
supported and will result in incorrect behavior of the MIR mode of the infrared peripheral,
therefore:
The tolerance of UARTCLK is defined by the UART to which it is connected.
UARTCLK frequency must accommodate the desired range of baud rates:
The frequency of UARTCLK must also be within the required error limits for all baud rates to
be used.
• FIRCLK must by 48.0 MHz with a tolerance of 0.01%.
• MIRCLK must be 18.432 MHz with a tolerance of 0.1%.
Disabled
UART2
Mode
MIR
SIR
FIR
DeviceCfg Register
U2EN
0
1
1
x
x
F
UARTCLK
F
UARTCLK
1
-- - F
5
3.68MHz
IonU2
Table 17-5. UART2 / IrDA Modes
FIRCLK
Copyright 2007 Cirrus Logic
0
1
1
1
x
MAX
≤
MIN
32
<
≤
≥
F
F
SIREn
×
UART2Ctrl Register
32 baudrate
PCLK
PCLK
65536 b
0
0
1
0
0
×
<
≤
66.0MHz
66.0MHz
× audrate
UARTE
0
1
1
0
0
MAX
MIN
IrEnable Register
EN[1]
0
0
0
1
1
EP93xx User’s Guide
EN[0]
0
0
1
0
1
17-21
IrDA
17