PIC16F1946-E/PT Microchip Technology, PIC16F1946-E/PT Datasheet - Page 152

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PIC16F1946-E/PT

Manufacturer Part Number
PIC16F1946-E/PT
Description
MCU 8BIT 8K FLASH 64TQFP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr

Specifications of PIC16F1946-E/PT

Core Size
8-Bit
Program Memory Size
14KB (8K x 14)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 17x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-TFQFP
Controller Family/series
PIC16F
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
32MHz
No. Of Timers
5
Interface
EUSART, I2C, SPI
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F1946-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC16F/LF1946/47
REGISTER 13-1:
REGISTER 13-2:
REGISTER 13-3:
DS41414B-page 152
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-0
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-0
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-0
R/W/HS-0/0
R/W-0/0
IOCBP7
R/W-0/0
IOCBN7
IOCBF7
IOCBP<7:0>: Interrupt-on-Change Positive Edge Enable bits
1 = Interrupt-on-Change enabled on the pin for a positive going edge. Associated Status bit and
0 = Interrupt-on-Change disabled for the associated pin.
IOCBN<7:0>: Interrupt-on-Change Negative Edge Enable bits
1 = Interrupt-on-Change enabled on the pin for a negative going edge. Associated Status bit and
0 = Interrupt-on-Change disabled for the associated pin.
IOCBF<7:0>: Interrupt-on-Change Flag bits
1 = An enabled change was detected on the associated pin.
0 = No change was detected, or the user cleared the detected change.
R/W/HS-0/0
R/W-0/0
IOCBP6
R/W-0/0
IOCBN6
IOCBF6
Set when IOCBPx = 1 and a rising edge was detected on RBx, or when IOCBNx = 1 and a falling
edge was detected on RBx.
interrupt flag will be set upon detecting an edge.
interrupt flag will be set upon detecting an edge.
IOCBP: INTERRUPT-ON-CHANGE POSITIVE EDGE REGISTER
IOCBN: INTERRUPT-ON-CHANGE NEGATIVE EDGE REGISTER
IOCBF: INTERRUPT-ON-CHANGE FLAG REGISTER
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W/HS-0/0 R/W/HS-0/0 R/W/HS-0/0
R/W-0/0
IOCBP5
R/W-0/0
IOCBN5
IOCBF5
R/W-0/0
IOCBP4
R/W-0/0
IOCBN4
IOCBF4
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
HS - Bit is set in hardware
IOCBP3
IOCBN3
R/W-0/0
R/W-0/0
IOCBF3
R/W/HS-0/0
IOCBN2
R/W-0/0
IOCBP2
R/W-0/0
IOCBF2
 2010 Microchip Technology Inc.
R/W/HS-0/0
IOCBN1
R/W-0/0
IOCBP1
R/W-0/0
IOCBF1
R/W/HS-0/0
R/W-0/0
IOCBP0
R/W-0/0
IOCBN0
IOCBF0
bit 0
bit 0
bit 0

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