PIC16F1946-E/PT Microchip Technology, PIC16F1946-E/PT Datasheet - Page 316

• Manufacturer Part Number: PIC16F1946-E/PT
• Description: MCU 8BIT 8K FLASH 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1946-E/PT

• Core Size: 8-Bit
• Program Memory Size: 14KB (8K x 14)
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 17x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC16F
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 512Byte
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Interface: EUSART, I2C, SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC16F/LF1946/47
25.3.4
The EUSART module has the capability of sending the
special Break character sequences that are required by
the LIN bus standard. A Break character consists of a
Start bit, followed by 12 ‘0’ bits and a Stop bit.
To send a Break character, set the SENDB and TXEN
bits of the TXxSTA register. The Break character trans-
mission is then initiated by a write to the TXxREG. The
value of data written to TXxREG will be ignored and all
‘0’s will be transmitted.
The SENDB bit is automatically reset by hardware after
the corresponding Stop bit is sent. This allows the user
to preload the transmit FIFO with the next transmit byte
following the Break character (typically, the Sync
character in the LIN specification).
The TRMT bit of the TXxSTA register indicates when the
transmit operation is active or Idle, just as it does during
normal transmission. See
the Break character sequence.
25.3.4.1
The following sequence will start a message frame
header made up of a Break, followed by an auto-baud
Sync byte. This sequence is typical of a LIN bus
master.
1.
2.
3.
4.
5.
FIGURE 25-9:
DS41414B-page 316
Reg. Empty Flag)
Write to TXxREG
(Transmit Shift
Configure the EUSART for the desired mode.
Set the TXEN and SENDB bits to enable the
Break sequence.
Load the TXxREG with a dummy character to
initiate transmission (the value is ignored).
Write ‘55h’ to TXxREG to load the Sync charac-
ter into the transmit FIFO buffer.
After the Break has been sent, the SENDB bit is
reset by hardware and the Sync character is
then transmitted.
TXx/CKx (pin)
interrupt Flag)
(send Break
BRG Output
(Shift Clock)
control bit)
(Transmit
TRMT bit
TXxIF bit
SENDB
BREAK CHARACTER SEQUENCE
Break and Sync Transmit Sequence
SEND BREAK CHARACTER SEQUENCE
Dummy Write
Figure 25-9
SENDB Sampled Here
Start bit
for the timing of
bit 0
Preliminary
bit 1
Break
When the TXxREG becomes empty, as indicated by
the TXxIF, the next data byte can be written to TXxREG.
25.3.5
The Enhanced EUSART module can receive a Break
character in two ways.
The first method to detect a Break character uses the
FERR bit of the RCxSTA register and the Received
data as indicated by RCxREG. The Baud Rate
Generator is assumed to have been initialized to the
expected baud rate.
A Break character has been received when;
• RCxIF bit is set
• FERR bit is set
• RCxREG = 00h
The second method uses the Auto-Wake-up feature
described in
Break”. By enabling this feature, the EUSART will
sample the next two transitions on RXx/DTx, cause an
RCxIF interrupt, and receive the next data byte
followed by another interrupt.
Note that following a Break character, the user will
typically want to enable the Auto-Baud Detect feature.
For both methods, the user can set the ABDEN bit of
the BAUDxCON register before placing the EUSART in
Sleep mode.
RECEIVING A BREAK CHARACTER
Section 25.3.3 “Auto-Wake-up on
bit 11
Auto Cleared
 2010 Microchip Technology Inc.
Stop bit