PIC16F87-I/ML Microchip Technology, PIC16F87-I/ML Datasheet - Page 118

IC MCU FLASH 4KX14 EEPROM 28QFN

PIC16F87-I/ML

Manufacturer Part Number
PIC16F87-I/ML
Description
IC MCU FLASH 4KX14 EEPROM 28QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F87-I/ML

Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Oscillator Type
Internal
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC16F
No. Of I/o's
16
Eeprom Memory Size
256Byte
Ram Memory Size
368Byte
Cpu Speed
20MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28QFN3 - SOCKET TRAN ICE 18DIP/28QFNAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNAC164033 - ADAPTER 28QFN TO 18DIPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
Data Converters
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
PIC16F87/88
The ADRESH:ADRESL registers contain the result of
the A/D conversion. When the A/D conversion is
complete, the result is loaded into the A/D Result register
pair, the GO/DONE bit (ADCON0<2>) is cleared and
A/D Interrupt Flag bit, ADIF, is set. The block diagram of
the A/D module is shown in Figure 12-1.
After the A/D module has been configured as desired,
the selected channel must be acquired before the
conversion is started. The analog input channels must
have their corresponding TRIS bits selected as inputs.
To determine sample time, see Section 12.1 “A/D
Acquisition Requirements”. After this sample time
has elapsed, the A/D conversion can be started.
These steps should be followed for doing an A/D
conversion:
1.
FIGURE 12-1:
DS30487C-page 116
Configure the A/D module:
• Configure analog/digital I/O (ANSEL)
• Configure voltage reference (ADCON1)
• Select A/D input channel (ADCON0)
• Select A/D conversion clock (ADCON0)
• Turn on A/D module (ADCON0)
Converter
A/D
A/D BLOCK DIAGRAM
(Reference
(Reference
Voltage)
Voltage)
V
V
REF
REF
-
+
(Input Voltage)
VCFG1:VCFG0
VCFG1:VCFG0
V
IN
AV
AV
DD
SS
CHS2:CHS0
2.
3.
4.
5.
6.
7.
Configure A/D interrupt (if desired):
• Clear ADIF bit
• Set ADIE bit
• SET PEIE bit
• Set GIE bit
Wait the required acquisition time.
Start conversion:
• Set GO/DONE bit (ADCON0)
Wait for A/D conversion to complete, by either:
• Polling for the GO/DONE bit to be cleared
• Waiting for the A/D interrupt
Read A/D Result register pair
(ADRESH:ADRESL), clear bit ADIF if required.
For next conversion, go to step 1 or step 2 as
required. The A/D conversion time per bit is
defined as T
required before the next acquisition starts.
(with interrupts disabled); OR
110
101
100
011
010
001
000
AD
. A minimum wait of 2 T
 2005 Microchip Technology Inc.
RB7/AN6/PGD/T1OSI
RB6/AN5/PGC/T1OSO/T1CKI
RA4/AN4/T0CKI/C2OUT
RA3/AN3/V
RA2/AN2/CV
RA1/AN1
RA0/AN0
REF
REF
+/C1OUT
/V
REF
-
AD
is

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