AT91SAM9G10-CU Atmel, AT91SAM9G10-CU Datasheet - Page 32

• Manufacturer Part Number: AT91SAM9G10-CU
• Description: IC MCU ARM9 SAMPLING 217CBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9G10-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 266MHz
• Connectivity: EBI/EMI, I²C, IrDA, ISI, MMC, SPI, SSC, UART/USART, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Controller Family/series: AT91
• No. Of I/o's: 96
• Ram Memory Size: 16KB
• Cpu Speed: 266MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: EBI, SPI, TWI, USART
• Maximum Clock Frequency: 266 MHz
• Number Of Programmable I/os: 96
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9G10-EK
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

10.5
10.6
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Static Memory Controller
SDRAM Controller
AT91SAM9G10
• External memory mapping, 256 Mbyte address space per Chip Select Line
• Up to Eight Chip Select Lines
• 8-, 16- or 32-bit Data Bus
• Multiple Access Modes supported
• Multiple device adaptability
• Multiple Wait State Management
• Slow Clock Mode Supported
• Supported Devices
• Numerous configurations supported
• Programming Facilities
• Energy-saving Capabilities
• Error detection
• SDRAM Power-up Initialization by software
• CAS Latency of 1, 2 and 3 supported
• Auto Precharge Command not used
– Byte Write or Byte Select Lines
– Asynchronous read in Page Mode supported (4- up to 32-byte page size)
– Compliant with LCD Module
– Control signal programmable setup, pulse and hold time for each Memory Bank
– Programmable Wait State Generation
– External Wait Request
– Programmable Data Float Time
– Standard and Low Power SDRAM (Mobile SDRAM)
– 2K, 4K, 8K Row Address Memory Parts
– SDRAM with two or four Internal Banks
– SDRAM with 16- or 32-bit Data Path
– Word, half-word, byte access
– Automatic page break when Memory Boundary has been reached
– Multibank Ping-pong Access
– Timing parameters specified by software
– Automatic refresh operation, refresh rate is programmable
– Self-refresh, power down and deep power down modes supported
– Refresh Error Interrupt
6462AS–ATARM–03-Jun-09