AT91SAM9G10-CU Atmel, AT91SAM9G10-CU Datasheet - Page 34

IC MCU ARM9 SAMPLING 217CBGA

AT91SAM9G10-CU

Manufacturer Part Number
AT91SAM9G10-CU
Description
IC MCU ARM9 SAMPLING 217CBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91SAM9G10-CU

Core Processor
ARM9
Core Size
16/32-Bit
Speed
266MHz
Connectivity
EBI/EMI, I²C, IrDA, ISI, MMC, SPI, SSC, UART/USART, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
32KB (32K x 8)
Program Memory Type
ROM
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
217-LFBGA
Controller Family/series
AT91
No. Of I/o's
96
Ram Memory Size
16KB
Cpu Speed
266MHz
No. Of Timers
1
Rohs Compliant
Yes
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
EBI, SPI, TWI, USART
Maximum Clock Frequency
266 MHz
Number Of Programmable I/os
96
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9G10-EK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

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10.10 Synchronous Serial Controller
10.11 Timer Counter
10.12 MultiMediaCard Interface
34
AT91SAM9G10
• RS485 with driver control signal
• ISO7816, T = 0 or T = 1 Protocols for interfacing with smart cards
• IrDA modulation and demodulation
• Test Modes
• Provides serial synchronous communication links used in audio and telecom applications
• Contains an independent receiver and transmitter and a common clock divider.
• Offers a configurable frame sync and data length.
• Receiver and transmitter can be programmed to start automatically or on detection of
• Receiver and transmitter include a data signal, a clock signal and a frame synchronization
• Three 16-bit Timer Counter Channels
• Wide range of functions including:
• Each channel is user-configurable and contains:
• Two global registers that act on all three TC Channels
• Two double-channel MultiMediaCard Interfaces, allowing concurrent transfers with 2 cards
• Compatibility with MultiMediaCard Specification Version 3.31
• Compatibility with SD Memory Card Specification Version 1.0
• Compatibility with SDIO Specification Version V1.1
• Cards clock rate up to Master Clock divided by 2
• Embedded power management to slow down clock rate when not used
(with CODECs in Master or Slave Modes, I
more).
different event on the frame sync signal.
signal.
– NACK handling, error counter with repetition and iteration limit
– Communication at up to 115.2 Kbps
– Remote Loopback, Local Loopback, Automatic Echo
– Frequency Measurement
– Event Counting
– Interval Measurement
– Pulse Generation
– Delay Timing
– Pulse Width Modulation
– Up/down Capabilities
– Three external clock inputs
– Five internal clock inputs
– Two multi-purpose input/output signals
2
S, TDM Buses, Magnetic Card Reader and
6462AS–ATARM–03-Jun-09

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