PIC18F2682-I/SO Microchip Technology, PIC18F2682-I/SO Datasheet - Page 170
![IC PIC MCU FLASH 40KX16 28SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
PIC18F2682-I/SO
Manufacturer Part Number
PIC18F2682-I/SO
Description
IC PIC MCU FLASH 40KX16 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PCM18XT0.pdf
(484 pages)
2.PIC18F2221-ISO.pdf
(46 pages)
3.PIC18F2682-ISP.pdf
(6 pages)
4.PIC18F2682-ISP.pdf
(4 pages)
Specifications of PIC18F2682-I/SO
Core Size
8-Bit
Program Memory Size
80KB (40K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
1024Byte
Ram Memory Size
3.25KB
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.25 KB
Interface Type
EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
28
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL
Lead Free Status / Rohs Status
Details
- PCM18XT0 PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F2682-ISP PDF datasheet #3
- PIC18F2682-ISP PDF datasheet #4
- Current page: 170 of 484
- Download datasheet (9Mb)
PIC18F2682/2685/4682/4685
TABLE 15-3:
DS39761C-page 170
INTCON
RCON
IPR1
PIR1
PIE1
IPR2
PIR2
PIE2
TRISB
TRISC
TMR1L
TMR1H
T1CON
TMR3H
TMR3L
T3CON
CCPR1L
CCPR1H
CCP1CON
ECCPR1L
ECCPR1H
ECCP1CON
Legend:
Note 1:
Name
2:
(1)
(1)
— = unimplemented, read as ‘0’. Shaded cells are not used by Capture and Compare, Timer1 or Timer3.
These bits or registers are available on PIC18F4682/4685 devices only.
The SBOREN bit is only available when CONFIG2L<1:0> =
(1)
PORTB Data Direction Register
PORTC Data Direction Register
Timer1 Register Low Byte
Timer1 Register High Byte
Timer3 Register High Byte
Timer3 Register Low Byte
Capture/Compare/PWM Register 1 Low Byte
Capture/Compare/PWM Register 1 High Byte
Enhanced Capture/Compare/PWM Register 1 Low Byte
Enhanced Capture/Compare/PWM Register 1 High Byte
EPWM1M1 EPWM1M0
GIE/GIEH
PSPIP
PSPIF
PSPIE
OSCFIP
OSCFIF
OSCFIE
RD16
RD16
IPEN
REGISTERS ASSOCIATED WITH CAPTURE, COMPARE, TIMER1 AND TIMER3
Bit 7
—
(1)
(1)
(1)
T3ECCP1
SBOREN
PEIE/GIEL
CMIP
CMIF
CMIE
T1RUN
ADIP
ADIF
ADIE
Bit 6
—
(1)
(1)
(1)
(2)
(1)
T1CKPS1 T1CKPS0 T1OSCEN
T3CKPS1 T3CKPS0 T3CCP1
EDC1B1
TMR0IE
DC1B1
RCIP
RCIF
RCIE
Bit 5
—
—
—
—
EDC1B0 ECCP1M3 ECCP1M2 ECCP1M1 ECCP1M0
DC1B0
INT0IE
Bit 4
TXIP
TXIF
TXIE
EEIP
EEIF
EEIE
RI
CCP1M3
SSPIP
SSPIF
SSPIE
BCLIP
BCLIF
BCLIE
RBIE
Bit 3
TO
01
(1)
; otherwise, it is disabled and reads as ‘
T1SYNC
T3SYNC
CCP1M2
TMR0IF
CCP1IP
CCP1IF
CCP1IE
HLVDIP
HLVDIE
HLVDIF
Bit 2
PD
TMR1CS
TMR3CS
CCP1M1
TMR2IP
TMR2IF
TMR2IE
TMR3IP
TMR3IF
TMR3IE
INT0IF
© 2009 Microchip Technology Inc.
Bit 1
POR
ECCP1IP
ECCP1IF
ECCP1IE
TMR1ON
TMR3ON
CCP1M0
TMR1IP
TMR1IE
TMR1IF
RBIF
Bit 0
BOR
(1)
(1)
(1)
0
on page
’.
Values
Reset
51
52
54
54
54
54
54
53
54
54
52
52
52
53
53
53
53
53
53
53
53
53
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