PIC18F2682-I/SO Microchip Technology, PIC18F2682-I/SO Datasheet - Page 86
![IC PIC MCU FLASH 40KX16 28SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
PIC18F2682-I/SO
Manufacturer Part Number
PIC18F2682-I/SO
Description
IC PIC MCU FLASH 40KX16 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PCM18XT0.pdf
(484 pages)
2.PIC18F2221-ISO.pdf
(46 pages)
3.PIC18F2682-ISP.pdf
(6 pages)
4.PIC18F2682-ISP.pdf
(4 pages)
Specifications of PIC18F2682-I/SO
Core Size
8-Bit
Program Memory Size
80KB (40K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
1024Byte
Ram Memory Size
3.25KB
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.25 KB
Interface Type
EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
28
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL
Lead Free Status / Rohs Status
Details
- PCM18XT0 PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F2682-ISP PDF datasheet #3
- PIC18F2682-ISP PDF datasheet #4
- Current page: 86 of 484
- Download datasheet (9Mb)
PIC18F2682/2685/4682/4685
TABLE 5-2:
DS39761C-page 86
B2EIDL
B2EIDH
B2SIDL
Receive mode
B2SIDL
Transmit mode
B2SIDH
B2CON
Receive mode
B2CON
Transmit mode
B1D7
B1D6
B1D5
B1D4
B1D3
B1D2
B1D1
B1D0
B1DLC
Receive mode
B1DLC
Transmit mode
B1EIDL
B1EIDH
B1SIDL
Receive mode
B1SIDL
Transmit mode
B1SIDH
B1CON
Receive mode
B1CON
Transmit mode
B0D7
B0D6
B0D5
B0D4
B0D3
B0D2
B0D1
B0D0
B0DLC
Receive mode
Legend: x = unknown, u = unchanged, - = unimplemented, q = value depends on condition. Shaded cells are unimplemented, read as ‘0’.
Note 1:
File Name
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
2:
3:
4:
5:
6:
7:
8:
9:
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
(8)
Bit 21 of the PC is only available in Test mode and Serial Programming modes.
The SBOREN bit is only available when CONFIG2L<1:0> = 01; otherwise, it is disabled and reads as ‘0’. See Section 4.4 “Brown-out Reset
(BOR)”.
These registers and/or bits are not implemented on PIC18F2682/2685 devices and are read as ‘0’. Reset values are shown for PIC18F4682/4685
devices; individual unimplemented bits should be interpreted as ‘—’.
The PLLEN bit is only available in specific oscillator configurations; otherwise, it is disabled and reads as ‘0’. See Section 2.6.4 “PLL in INTOSC
Modes”.
The RE3 bit is only available when Master Clear Reset is disabled (CONFIG3H<7> = 0); otherwise, RE3 reads as ‘0’. This bit is read-only.
RA6/RA7 and their associated latch and direction bits are individually configured as port pins based on various primary oscillator modes. When
disabled, these bits read as ‘0’.
CAN bits have multiple functions depending on the selected mode of the CAN module.
This register reads all ‘0’s until the ECAN™ technology is set up in Mode 1 or Mode 2.
These registers and/or bits are available on PIC18F4682/4685 devices only.
RXFUL
RXFUL
B1D77
B1D67
B1D57
B1D47
B1D37
B1D27
B1D17
B1D07
B0D77
B0D67
B0D57
B0D47
B0D37
B0D27
B0D17
B0D07
TXBIF
TXBIF
EID15
SID10
EID15
SID10
Bit 7
EID7
SID2
SID2
EID7
SID2
SID2
—
—
—
REGISTER FILE SUMMARY (PIC18F2682/2685/4682/4685) (CONTINUED)
RXRTR
RXRTR
TXRTR
TXABT
B1D76
B1D66
B1D56
B1D46
B1D36
B1D26
B1D16
B1D06
B0D76
B0D66
B0D56
B0D46
B0D36
B0D26
B0D16
B0D06
EID14
RXM1
RXM1
EID14
RXM1
EID6
SID1
SID1
SID9
EID6
SID1
SID1
SID9
Bit 6
RXRTRRO
RXRTRRO
TXLARB
TXLARB
B1D75
B1D65
B1D55
B1D45
B1D35
B1D25
B1D15
B1D05
B0D75
B0D65
B0D55
B0D45
B0D35
B0D25
B0D15
B0D05
EID13
EID13
EID5
SID0
SID0
SID8
EID5
SID0
SID0
SID8
Bit 5
RB1
RB1
—
FILHIT4
FILHIT4
TXERR
TXERR
B1D74
B1D64
B1D54
B1D44
B1D34
B1D24
B1D14
B1D04
B0D74
B0D64
B0D54
B0D44
B0D34
B0D24
B0D14
B0D04
EID12
EID12
EID4
SID7
EID4
SID7
Bit 4
SRR
SRR
RB0
RB0
—
—
—
FILHIT3
FILHIT3
TXREQ
TXREQ
B1D73
B1D63
B1D53
B1D43
B1D33
B1D23
B1D13
B1D03
B0D73
B0D63
B0D53
B0D43
B0D33
B0D23
B0D13
B0D03
EXIDE
EXIDE
EID11
EID11
DLC3
DLC3
DLC3
EXID
EXID
Bit 3
EID3
SID6
EID3
SID6
FILHIT2
FILHIT2
RTREN
RTREN
B1D72
B1D62
B1D52
B1D42
B1D32
B1D22
B1D12
B1D02
B0D72
B0D62
B0D52
B0D42
B0D32
B0D22
B0D12
B0D02
EID10
EID10
DLC2
DLC2
DLC2
EID2
SID5
EID2
SID5
Bit 2
—
—
—
—
FILHIT1
TXPRI1
FILHIT1
TXPRI1
B1D71
B1D61
B1D51
B1D41
B1D31
B1D21
B1D11
B1D01
B0D71
B0D61
B0D51
B0D41
B0D31
B0D21
B0D11
B0D01
EID17
EID17
EID17
EID17
DLC1
DLC1
DLC1
EID1
EID9
SID4
EID1
EID9
SID4
Bit 1
© 2009 Microchip Technology Inc.
FILHIT0
TXPRI0
FILHIT0
TXPRI0
B1D70
B1D60
B1D50
B1D40
B1D30
B1D20
B1D10
B1D00
B0D70
B0D60
B0D50
B0D40
B0D30
B0D20
B0D10
B0D00
EID16
EID16
EID16
EID16
DLC0
DLC0
DLC0
EID0
EID8
SID3
EID0
EID8
SID3
Bit 0
xxxx xxxx 60, 301
xxxx xxxx 60, 301
xxxx x-xx 58, 300
xxx- x-xx 58, 300
xxxx xxxx 60, 299
0000 0000 60, 298
0000 0000 60, 298
xxxx xxxx 60, 302
xxxx xxxx 60, 302
xxxx xxxx 60, 302
xxxx xxxx 60, 302
xxxx xxxx 60, 302
xxxx xxxx 60, 302
xxxx xxxx 60, 302
xxxx xxxx 60, 302
-xxx xxxx 58, 303
-x-- xxxx 58, 304
xxxx xxxx 60, 301
xxxx xxxx 60, 301
xxxx x-xx 58, 300
xxx- x-xx 58, 300
xxxx xxxx 60, 299
0000 0000 60, 298
0000 0000 60, 298
xxxx xxxx 60, 302
xxxx xxxx 60, 302
xxxx xxxx 60, 302
xxxx xxxx 60, 302
xxxx xxxx 60, 302
xxxx xxxx 60, 302
xxxx xxxx 60, 302
xxxx xxxx 60, 302
-xxx xxxx 58, 303
POR, BOR
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on page:
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