PIC18F2682-I/SO Microchip Technology, PIC18F2682-I/SO Datasheet - Page 454
![IC PIC MCU FLASH 40KX16 28SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
PIC18F2682-I/SO
Manufacturer Part Number
PIC18F2682-I/SO
Description
IC PIC MCU FLASH 40KX16 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PCM18XT0.pdf
(484 pages)
2.PIC18F2221-ISO.pdf
(46 pages)
3.PIC18F2682-ISP.pdf
(6 pages)
4.PIC18F2682-ISP.pdf
(4 pages)
Specifications of PIC18F2682-I/SO
Core Size
8-Bit
Program Memory Size
80KB (40K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
1024Byte
Ram Memory Size
3.25KB
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.25 KB
Interface Type
EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
28
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL
Lead Free Status / Rohs Status
Details
- PCM18XT0 PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F2682-ISP PDF datasheet #3
- PIC18F2682-ISP PDF datasheet #4
- Current page: 454 of 484
- Download datasheet (9Mb)
PIC18F2682/2685/4682/4685
FIGURE 27-22:
TABLE 27-25: A/D CONVERSION REQUIREMENTS
DS39761C-page 454
130
131
132
135
136
Note 1:
Param
No.
Note 1:
A/D CLK
A/D DATA
2:
3:
4:
5:
SAMPLE
ADRES
T
T
T
T
T
BSF ADCON0, GO
Symbol
AD
CNV
ACQ
SWC
AMP
ADIF
2:
The time of the A/D clock period is dependent on the device frequency and the T
ADRES register may be read on the following T
The time for the holding capacitor to acquire the “New” input voltage when the voltage changes full scale
after the conversion (AV
50Ω.
On the following cycle of the device clock.
See Section 19.0 “10-Bit Analog-to-Digital Converter (A/D) Module” for minimum conditions when input
voltage has changed more than 1 LSb.
GO
Q4
(1)
If the A/D clock source is selected as RC, a time of T
This allows the SLEEP instruction to be executed.
This is a minimal RC delay (typically 100 ns), which also disconnects the holding capacitor from the analog input.
A/D Clock Period
Conversion Time
(not including acquisition time) (Note 2)
Acquisition Time (Note 3)
Switching Time from Convert → Sample
Amplifier Settling Time (Note 5)
132
A/D CONVERSION TIMING
Characteristic
(Note 2)
DD
9
to AV
PIC18FXXXX
PIC18LFXXXX
PIC18FXXXX
PIC18LFXXXX
8
SS
OLD_DATA
or AV
7
SAMPLING STOPPED
SS
. . .
to AV
CY
is added before the A/D clock starts.
CY
Min
1.4
0.7
1.4
—
—
11
—
DD
1
. . .
cycle.
131
130
). The source impedance (R
(Note 4)
25.0
25.0
Max
2
12
—
—
1
3
(1)
(1)
1
Units
T
μs
μs
μs
μs
μs
μs
AD
T
V
T
A/D RC mode
V
-40°C to +85°C
This may be used if the “new” input
voltage has not changed by more
than 1 LSb (i.e., 5 mV @ 5.12V)
from the last sampled voltage (as
stated on C
OSC
OSC
DD
DD
0
© 2009 Microchip Technology Inc.
= 2.0V;
= 2.0V; A/D RC mode
based, V
based, V
S
AD
) on the input channels is
clock divider.
Conditions
HOLD
DONE
NEW_DATA
REF
REF
).
T
CY
≥ 3.0V
full range
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