MC9S08GT16ACFBE Freescale Semiconductor, MC9S08GT16ACFBE Datasheet - Page 172

IC MCU 16K FLASH 2K RAM 44-QFP

MC9S08GT16ACFBE

Manufacturer Part Number
MC9S08GT16ACFBE
Description
IC MCU 16K FLASH 2K RAM 44-QFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08GT16ACFBE

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFP
Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
I2C/SCI/SPI
Total Internal Ram Size
2KB
# I/os (max)
36
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
1.8V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PQFP
Processor Series
S08GT
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
2 KB
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
36
Operating Supply Voltage
3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
M68EVB908GB60E, M68DEMO908GB60E
Minimum Operating Temperature
- 40 C
For Use With
M68DEMO908GB60E - BOARD DEMO MC9S08GB60M68EVB908GB60E - BOARD EVAL FOR MC9S08GB60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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Serial Communications Interface (S08SCIV1)
11.1.3
Figure 11-2
172
RATE CLOCK
1 × BAUD
Block Diagram
shows the transmitter portion of the SCI.
INTERNAL BUS
TE
PE
PT
M
ENABLE
TXDIR
SBK
Figure 11-2. SCI Transmitter Block Diagram
GENERATION
PARITY
T8
MC9S08GT16A/GT8A Data Sheet, Rev. 1
H
(WRITE-ONLY)
8
11-BIT TRANSMIT SHIFT REGISTER
7
6
SCID – Tx BUFFER
TRANSMIT CONTROL
SHIFT DIRECTION
5
(Figure 11-3
4
TDRE
TCIE
TIE
TC
3
2
1
0
shows the receiver portion of the SCI.)
L
LOOPS
RSRC
SCI CONTROLS TxD
TxD DIRECTION
CONTROL
LOOP
Tx INTERRUPT
REQUEST
Freescale Semiconductor
TO RECEIVE
DATA IN
TO TxD PIN
TO TxD
PIN LOGIC

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