HD64F3672FPV Renesas Electronics America, HD64F3672FPV Datasheet - Page 101

IC H8/3672 MCU FLASH 64LQFP

HD64F3672FPV

Manufacturer Part Number
HD64F3672FPV
Description
IC H8/3672 MCU FLASH 64LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheets

Specifications of HD64F3672FPV

Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
26
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
64-LQFP
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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2.2.26 (2) DIVXS (W)
DIVXS (DIVide eXtend as Signed)
Operation
ERd ÷ Rs
Assembly-Language Format
DIVXS.W Rs, ERd
Operand Size
Word
Description
This instruction divides the contents of a 32-bit register ERd (destination register) by the contents
of a 16-bit register Rs (source register) and stores the result in the 32-bit register ERd. The
division is signed. The operation performed is 32 bits ÷ 16 bits
remainder. The quotient is placed in the lower 16 bits (Rd) of the 32-bit register ERd. The
remainder is placed in the upper 16 bits (Ed).
Valid results are not assured if division by zero is attempted or an overflow occurs. For
information on avoiding overflow, see DIVXS Instruction, Zero Divide, and Overflow.
Available Registers
ERd: ER0 to ER7
Rs:
R0 to R7, E0 to E7
ERd
Dividend
32 bits
ERd
Divisor
16 bits
Rs
Condition Code
H: Previous value remains unchanged.
N: Set to 1 if the quotient is negative;
Z: Set to 1 if the divisor is zero; otherwise
V: Previous value remains unchanged.
C: Previous value remains unchanged.
otherwise cleared to 0.
cleared to 0.
— —
I
Remainder
Rev. 3.00 Dec 13, 2004 page 85 of 258
16 bits
UI
Section 2 Instruction Descriptions
16-bit quotient and 16-bit
H
ERd
Quotient
U
16 bits
N
REJ09B0213-0300
Z
Divide Signed
V
C

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