MC9S12C96CFUE Freescale Semiconductor, MC9S12C96CFUE Datasheet - Page 208

• Manufacturer Part Number: MC9S12C96CFUE
• Description: IC MCU 96K FLASH 4K RAM 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12C96CFUE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Processor Series: S12C
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 4 KB
• Interface Type: CAN/SCI/SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 8
• Operating Supply Voltage: - 0.3 V to + 6.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68EVB912C32EE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chapter 7 Debug Module (DBGV1) Block Description
208
RWBEN
Field
RWB
1
0
1. If PPAGE is selected.
1. If PPAGE is selected.
1. Expansion addresses for breakpoint B are not applicable in this mode.
BKAMBH:BKAMBL
BKBMBH:BKBMBL
BKBMBH:BKBMBL
Read/Write Comparator B Enable Bit — The RWBEN bit controls whether read or write comparison is enabled
for comparator B. See
for tagged operations.
0 Read/Write is not used in comparison
1 Read/Write is used in comparison
Read/Write Comparator B Value Bit — The RWB bit controls whether read or write is used in compare for
comparator B. The RWB bit is not used if RWBEN = 0.
0 Write cycle will be matched
1 Read cycle will be matched
Note: RWB and RWBEN are not used in full mode.
x:0
0:1
1:1
x:0
0:1
1:1
0:0
0:1
1:0
1:1
Table 7-17. Breakpoint Mask Bits for Second Address (Dual Mode)
Table 7-18. Breakpoint Mask Bits for Data Breakpoints (Full Mode)
Table 7-16. Breakpoint Mask Bits for First Address
Table 7-15. DBGC3 Field Descriptions (continued)
Section 7.4.2.1.1, “Read or Write
High and low byte compare
MC9S12C-Family / MC9S12GC-Family
16K byte address range
16K byte address range
256 byte address range
256 byte address range
Full address compare
Full address compare
Address Compare
Address Compare
Data Compare
No compare
High byte
Low byte
Rev 01.24
Description
Comparison,” for more information. This bit is not useful
DBGCAX
DBGCBX
DBGCBX
Yes
Yes
No
Yes
Yes
Yes
Yes
No
No
No
(1)
(1)
(1)
1
1
1
1
1
1
1
DBGCAH
DBGCBH
DBGCBH
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
Freescale Semiconductor
DBGCAL
DBGCBL
DBGCBL
Yes
Yes
Yes
Yes
No
No
No
No
No
No