C8051F067-GQ Silicon Laboratories Inc, C8051F067-GQ Datasheet - Page 232

• Manufacturer Part Number: C8051F067-GQ
• Description: IC 8051 MCU 32K FLASH 64TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F06xr

Specifications of C8051F067-GQ

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: C8051F0x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 4.25 KB
• Interface Type: I2C, SMBus, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 5
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F060DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16 bit, 1 Channel
• On-chip Dac: 12 bit, 2 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 336-1222

C8051F060/1/2/3/4/5/6/7
232
Bit7-0:
Bit 4:
R/W
R/W
Bit7
Bit7
*
CAN0ADR: CAN Address Index Register.
The CAN0ADR Register is used to point the [CAN0DATH:CAN0DATL] to a desired CAN
Register. The desired CAN Register’s index number is moved into CAN0ADR. The
CAN0DAT Register can then read/write to and from the CAN Register.
Note: When the value of CAN0ADR is 0x08-0x12 and 0x20-2A (IF1 and IF2 registers), this
register will autoincrement by 1 upon a write to CAN0DATL. See
Autoincrement Feature” on page
All CAN registers’ functions/definitions are listed and described in the Bosch CAN
User’s Guide.
CANIF: CAN Interrupt Flag. Write = don’t care.
0: CAN interrupt has not occured.
1: CAN interrupt has occured and is active.
CANIF is controlled by the CAN controller and is cleared by hardware once all interrupt con-
ditions have been cleared in the CAN controller. See section 3.4.1 in the Bosch CAN User’s
Guide (page 24) for more information concerning CAN controller interrupts.
*All CAN registers’ functions/definitions are listed and described in the Bosch CAN
User’s Guide with the exception of the CANIF bit.
This register may be accessed directly in the CIP-51 SFR register space, or through the indi-
rect, index method (See Section
Access CAN
R/W
R/W
Bit6
Bit6
*
Figure 19.5. CAN0ADR: CAN Address Index Register
Registers” on page 229).
R/W
R/W
Bit5
Bit5
Figure 19.6. CAN0CN: CAN Control Register
*
CANIF
R/W
Bit4
Bit4
R
“19.2.5. Using CAN0ADR, CAN0DATH, and CANDATL To
229.
Rev. 1.2
R/W
R/W
Bit3
Bit3
*
R/W
R/W
Bit2
Bit2
*
R/W
R/W
Bit1
Bit1
*
Section “19.2.6. CAN0ADR
SFR Address:
SFR Address:
SFR Page:
SFR Page:
R/W
R/W
Bit0
Bit0
*
0xDA
1
0xF8
1
Reset Value
Reset Value
00000000