C8051F067-GQ Silicon Laboratories Inc, C8051F067-GQ Datasheet - Page 305

IC 8051 MCU 32K FLASH 64TQFP

C8051F067-GQ

Manufacturer Part Number
C8051F067-GQ
Description
IC 8051 MCU 32K FLASH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F06xr
Datasheets

Specifications of C8051F067-GQ

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
C8051F0x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
24
Number Of Timers
5
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F060DK
Minimum Operating Temperature
- 40 C
On-chip Adc
16 bit, 1 Channel
On-chip Dac
12 bit, 2 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
336-1222

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25.2. Capture/Compare Modules
Each module can be configured to operate independently in one of six operation modes: Edge-triggered
Capture, Software Timer, High Speed Output, Frequency Output, 8-Bit Pulse Width Modulator, or 16-Bit
Pulse Width Modulator. Each module has Special Function Registers (SFRs) associated with it in the CIP-
51 system controller. These registers are used to exchange data with a module and configure the module's
mode of operation.
Table 25.2 summarizes the bit settings in the PCA0CPMn registers used to select the PCA0 capture/com-
pare module’s operating modes. Setting the ECCFn bit in a PCA0CPMn register enables the module's
CCFn interrupt. Note: PCA0 interrupts must be globally enabled before individual CCFn interrupts are rec-
ognized. PCA0 interrupts are globally enabled by setting the EA bit (IE.7) and the EPCA0 bit (EIE1.3) to
logic 1. See Figure 25.3 for details on the PCA interrupt configuration.
PWM16 ECOM CAPP CAPN
X
X
X
X
X
X
0
1
Timer Overflow
PCA Counter/
P
W
M
1
6
n
PCA Module 0
PCA Module 1
PCA Module 2
PCA Module 3
PCA Module 4
PCA Module 5
(for n = 0 to 5)
PCA0CPMn
E
C
O
M
n
X = Don’t Care
C
A
P
P
n
Table 25.2. PCA0CPM Register Settings for PCA Capture/Compare Modules
C
A
P
N
n
X
X
X
1
1
1
1
1
M
A
T
n
T
O
G
n
W
M
P
n
E
C
C
F
n
C
F
C
R
1
0
1
0
0
0
0
0
PCA0CN
C
C
F
5
C
C
F
4
C
C
F
3
C
C
F
2
C
C
F
1
C
C
F
0
0
1
1
0
0
0
0
0
Figure 25.3. PCA Interrupt Block Diagram
ECCF0
ECCF1
ECCF2
ECCF3
ECCF4
ECCF5
C
D
L
I
PCA0MD
C
P
S
MAT
2
C
P
S
1
0
0
0
1
1
0
0
0
0
1
0
1
0
1
0
1
0
1
0
1
C
P
S
0
C
E
F
0
1
TOG
0
0
0
0
1
1
0
0
Rev. 1.2
PWM ECCF
0
0
0
0
0
1
1
1
C8051F060/1/2/3/4/5/6/7
X
X
X
X
X
X
0
0
Capture triggered by positive edge on
CEXn
Capture triggered by negative edge on
CEXn
Capture triggered by transition on
CEXn
Software Timer
High Speed Output
Frequency Output
8-Bit Pulse Width Modulator
16-Bit Pulse Width Modulator
EPCA0
(EIE.3)
Operation Mode
0
1
(IE.7)
EA
0
1
Interrupt
Priority
Decoder
305

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