PIC16C74-04I/P Microchip Technology, PIC16C74-04I/P Datasheet - Page 51

MICRO CTRL 4K 4MHZ OTP 40DIP

PIC16C74-04I/P

Manufacturer Part Number
PIC16C74-04I/P
Description
MICRO CTRL 4K 4MHZ OTP 40DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheet

Specifications of PIC16C74-04I/P

Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
33
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 8x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
5.5
PORTE has three pins RE0/RD/AN5, RE1/WR/AN6
and RE2/CS/AN7, which are individually configurable
as inputs or outputs. These pins have Schmitt Trigger
input buffers.
I/O PORTE becomes control inputs for the micropro-
cessor port when bit PSPMODE (TRISE<4>) is set. In
this mode, the user must make sure that the
TRISE<2:0> bits are set (pins are configured as digital
inputs) and that register ADCON1 is configured for dig-
ital I/O. In this mode the input buffers are TTL.
Figure 5-9 shows the TRISE register, which also con-
trols the parallel slave port operation.
PORTE pins are multiplexed with analog inputs. The
operation of these pins is selected by control bits in the
ADCON1 register. When selected as an analog input,
these pins will read as '0's.
TRISE controls the direction of the RE pins, even when
they are being used as analog inputs. The user must
make sure to keep the pins configured as inputs when
using them as analog inputs.
FIGURE 5-9:
1997 Microchip Technology Inc.
bit7
bit 7 :
bit 6:
bit 5:
bit 4:
bit 3:
bit 2:
bit 1:
bit 0:
R-0
IBF
PORTE and TRISE Register
Applicable Devices
72 73 73A 74 74A 76 77
IBF: Input Buffer Full Status bit
1 = A word has been received and is waiting to be read by the CPU
0 = No word has been received
OBF: Output Buffer Full Status bit
1 = The output buffer still holds a previously written word
0 = The output buffer has been read
IBOV: Input Buffer Overflow Detect bit (in microprocessor mode)
1 = A write occurred when a previously input word has not been read (must be cleared in software)
0 = No overflow occurred
PSPMODE: Parallel Slave Port Mode Select bit
1 = Parallel slave port mode
0 = General purpose I/O mode
Unimplemented: Read as '0'
PORTE Data Direction Bits
Bit2: Direction Control bit for pin RE2/CS/AN7
1 = Input
0 = Output
Bit1: Direction Control bit for pin RE1/WR/AN6
1 = Input
0 = Output
Bit0: Direction Control bit for pin RE0/RD/AN5
1 = Input
0 = Output
OBF
R-0
TRISE REGISTER (ADDRESS 89h)
R/W-0
IBOV
PSPMODE
R/W-0
U-0
R/W-1
bit2
FIGURE 5-8:
Note:
Note 1: I/O pins have protection diodes to V
R/W-1
bit1
Data
bus
WR
TRIS
WR
PORT
RD PORT
On a Power-on Reset these pins are con-
figured as analog inputs.
R/W-1
TRIS Latch
Data Latch
bit0
D
D
CK
CK
bit0
RD TRIS
PORTE BLOCK DIAGRAM (IN
I/O PORT MODE)
Q
Q
R = Readable bit
W = Writable bit
U = Unimplemented bit,
- n = Value at POR reset
Q
read as ‘0’
PIC16C7X
EN
Schmitt
Trigger
input
buffer
EN
D
DS30390E-page 51
DD
I/O pin
and V
SS
(1)
.

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