ATMEGA88P-20MU Atmel, ATMEGA88P-20MU Datasheet - Page 223

MCU AVR 8K ISP FLASH 20MHZ 32QFN

ATMEGA88P-20MU

Manufacturer Part Number
ATMEGA88P-20MU
Description
MCU AVR 8K ISP FLASH 20MHZ 32QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA88P-20MU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATASTK512-EK1-IND
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
32MLF
Device Core
AVR
Family Name
ATmega
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
For Use With
ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA88P-20MU
Manufacturer:
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Quantity:
12 246
8025L–AVR–7/10
6. When the data packet has been transmitted, the TWINT Flag in TWCR is set, and TWSR
7. The application software should now examine the value of TWSR, to make sure that the
Even though this example is simple, it shows the principles involved in all TWI transmissions.
These can be summarized as follows:
• When the TWI has finished an operation and expects application response, the TWINT Flag is
• When the TWINT Flag is set, the user must update all TWI Registers with the value relevant for
• After all TWI Register updates and other pending application software tasks have been
In the following an assembly and C implementation of the example is given. Note that the code
below assumes that several definitions have been made, for example by using include-files.
set. The SCL line is pulled low until TWINT is cleared.
the next TWI bus cycle. As an example, TWDR must be loaded with the value to be transmitted
in the next bus cycle.
completed, TWCR is written. When writing TWCR, the TWINT bit should be set. Writing a one
to TWINT clears the flag. The TWI will then commence executing whatever operation was
specified by the TWCR setting.
not start any operation as long as the TWINT bit in TWCR is set. Immediately after the
application has cleared TWINT, the TWI will initiate transmission of the data packet.
is updated with a status code indicating that the data packet has successfully been sent.
The status code will also reflect whether a Slave acknowledged the packet or not.
data packet was successfully transmitted, and that the value of the ACK bit was as
expected. If TWSR indicates otherwise, the application software might take some special
action, like calling an error routine. Assuming that the status code is as expected, the
application must write a specific value to TWCR, instructing the TWI hardware to transmit
a STOP condition. Which value to write is described later on. However, it is important that
the TWINT bit is set in the value written. Writing a one to TWINT clears the flag. The TWI
will not start any operation as long as the TWINT bit in TWCR is set. Immediately after
the application has cleared TWINT, the TWI will initiate transmission of the STOP condi-
tion. Note that TWINT is NOT set after a STOP condition has been sent.
ATmega48P/88P/168P
223

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