ATMEGA88P-20MU Atmel, ATMEGA88P-20MU Datasheet - Page 268

MCU AVR 8K ISP FLASH 20MHZ 32QFN

ATMEGA88P-20MU

Manufacturer Part Number
ATMEGA88P-20MU
Description
MCU AVR 8K ISP FLASH 20MHZ 32QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA88P-20MU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATASTK512-EK1-IND
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
32MLF
Device Core
AVR
Family Name
ATmega
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
For Use With
ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA88P-20MU
Manufacturer:
ATMEL
Quantity:
12 246
25.1.3
25.2
8025L–AVR–7/10
Addressing the Flash During Self-Programming
Performing a Page Write
If the EEPROM is written in the middle of an SPM Page Load operation, all data loaded will be
lost.
To execute Page Write, set up the address in the Z-pointer, write “00000101” to SPMCSR and
execute SPM within four clock cycles after writing SPMCSR. The data in R1 and R0 is ignored.
The page address must be written to PCPAGE. Other bits in the Z-pointer must be written to
zero during this operation.
• The CPU is halted during the Page Write operation.
The Z-pointer is used to address the SPM commands.
Since the Flash is organized in pages (see
be treated as having two different sections. One section, consisting of the least significant bits, is
addressing the words within a page, while the most significant bits are addressing the pages.
This is shown in
are addressed independently. Therefore it is of major importance that the software addresses
the same page in both the Page Erase and Page Write operation.
The LPM instruction uses the Z-pointer to store the address. Since this instruction addresses the
Flash byte-by-byte, also the LSB (bit Z0) of the Z-pointer is used.
Figure 25-1. Addressing the Flash During SPM
Note:
Bit
ZH (R31)
ZL (R30)
Z - REGISTER
1. The different variables used in
PROGRAM MEMORY
BIT
PAGE
PROGRAM
COUNTER
15
Figure 26-3 on page
Z15
15
Z7
7
PAGE ADDRESS
WITHIN THE FLASH
ZPCMSB
PCMSB
Z14
14
Z6
6
PCPAGE
Z13
13
Z5
5
280. Note that the Page Erase and Page Write operations
Figure 26-3
ZPAGEMSB
PAGEMSB
Table 27-9 on page
PCWORD
Z12
12
Z4
4
WORD ADDRESS
WITHIN A PAGE
(1)
are listed in
1
Z11
0
0
ATmega48P/88P/168P
11
Z3
3
INSTRUCTION WORD
PAGE
Table 27-9 on page
Z10
10
Z2
2
295), the Program Counter can
Z9
Z1
9
1
PCWORD[PAGEMSB:0]:
00
01
02
PAGEEND
295.
Z8
Z0
8
0
268

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