DSP56321VF200 Freescale Semiconductor, DSP56321VF200 Datasheet - Page 65

IC DSP 24BIT 200MHZ 196-BGA

DSP56321VF200

Manufacturer Part Number
DSP56321VF200
Description
IC DSP 24BIT 200MHZ 196-BGA
Manufacturer
Freescale Semiconductor
Series
DSP563xxr
Type
Fixed Pointr
Datasheet

Specifications of DSP56321VF200

Interface
Host Interface, SSI, SCI
Clock Rate
200MHz
Non-volatile Memory
ROM (576 B)
On-chip Ram
576kB
Voltage - I/o
3.30V
Voltage - Core
1.60V
Operating Temperature
-40°C ~ 100°C
Mounting Type
*
Package / Case
196-MAPBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Power Consumption Benchmark
The following benchmark program evaluates DSP56321 power use in a test situation. It enables the PLL, disables
the external clock, and uses repeated multiply-accumulate (MAC) instructions with a set of synthetic DSP
application data to emulate intensive sustained DSP operation.
Freescale Semiconductor
;**************************************************************************
;**************************************************************************
;*
;*
;*
;**************************************************************************
I_VEC EQU $000000; Interrupt vectors for program debug only
START EQU $8000; MAIN (external) program starting address
INT_PROG
INT_XDAT
INT_YDAT
;
; Default: 2w.s (SRAM)
;
;
; Load the program
;
PLOAD_LOOP
;
; Load the X-data
;
XLOAD_LOOP
page
nolist
INCLUDE "ioequ.asm"
INCLUDE "intequ.asm"
list
org
movep #$0243FF,x:M_BCR ;
movep #$00000F,x:M_PCTL
move
move
do
move
move
nop
move
move
do
move
move
EQU $100 ; INTERNAL program memory starting address
EQU $0; INTERNAL X-data memory starting address
EQU $0; INTERNAL Y-data memory starting address
200,55,0,0,0
P:START
#INT_PROG,r0
#PROG_START,r1
#(PROG_END-PROG_START),PLOAD_LOOP
p:(r1)+,x0
x0,p:(r0)+
#INT_XDAT,r0
#XDAT_START,r1
#(XDAT_END-XDAT_START),XLOAD_LOOP
p:(r1)+,x0
x0,x:(r0)+
CHECKS
DSP56321 Technical Data, Rev. 11
Typical Power Consumption
; BCR: Area 3 = 2 w.s (SRAM)
; XTAL disable
; PLL enable
*
*
*
A
A-1

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