DSP56321VF200 Freescale Semiconductor, DSP56321VF200 Datasheet - Page 76

• Manufacturer Part Number: DSP56321VF200
• Description: IC DSP 24BIT 200MHZ 196-BGA
• Manufacturer: Freescale Semiconductor
• Series: DSP563xxr
• Type: Fixed Pointr

Specifications of DSP56321VF200

• Interface: Host Interface, SSI, SCI
• Clock Rate: 200MHz
• Non-volatile Memory: ROM (576 B)
• On-chip Ram: 576kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.60V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: *
• Package / Case: 196-MAPBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Power Consumption Benchmark
A-12
M_DPR0 EQU 17
M_DPR1 EQU 18
M_DTM EQU $380000
M_DTM0 EQU 19
M_DTM1 EQU 20
M_DTM2 EQU 21
M_DIE EQU 22
M_DE EQU 23
;
M_DTD EQU $3F
M_DTD0 EQU 0
M_DTD1 EQU 1
M_DTD2 EQU 2
M_DTD3 EQU 3
M_DTD4 EQU 4
M_DTD5 EQU 5
M_DACT EQU
M_DCH EQU
M_DCH0 EQU
M_DCH1 EQU
M_DCH2 EQU
;------------------------------------------------------------------------
;
;
;
;------------------------------------------------------------------------
M_FDIR
M_FDOR
M_FKIR
M_FCNT
M_FCSR
M_FACR
M_FDBA
M_FCBA
M_FDCH
;-----------------------------------------------------------------------
;
;
;
;----------------------------------------------------------------------
;
M_DMFR
M_DPSC
M_PCTL
;
M_MFI
M_MFN
M_MFD
M_PDF
M_CPLM EQU
M_MFO
M_CDF
EQU
DMA Status Register
EQUATES for Enhanced Filter Co-Processor (EFCOP)
EQUATES for Phase Locked Loop (PLL)
Register Addresses Of PLL
PLL Control Register
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
$E00
8
9
10
11
22
23
$FFFFB0
$FFFFB1
$FFFFB2
$FFFFB3
$FFFFB4
$FFFFB5
$FFFFB6
$FFFFB7
$FFFFB8
$FFFFD0
$FFFFD0
$FFFFD1
$F
$7F0
$3F800
$3C0000
$70
DSP56321 Technical Data, Rev. 11
; EFCOP Data Input Register
; EFCOP Data Output Register
; EFCOP K-Constant Register
; EFCOP Filter Counter
; EFCOP Control Status Register
; EFCOP ALU Control Register
; EFCOP Data Base Address
; EFCOP Coefficient Base Address
; EFCOP Decimation/Channel Register
; DMA Channel Priority Level (low)
; DMA Channel Priority Level (high)
; DMA Transfer Mode Mask (DTM2-DTM0)
; DMA Transfer Mode 0
; DMA Transfer Mode 1
; DMA Transfer Mode 2
; DMA Interrupt Enable bit
; DMA Channel Enable bit
; Channel Transfer Done Status MASK (DTD0-DTD5)
; DMA Channel Transfer Done Status 0
; DMA Channel Transfer Done Status 1
; DMA Channel Transfer Done Status 2
; DMA Channel Transfer Done Status 3
; DMA Channel Transfer Done Status 4
; DMA Channel Transfer Done Status 5
; DMA Active State
; DMA Active Channel Mask (DCH0-DCH2)
; DMA Active Channel 0
; DMA Active Channel 1
; DMA Active Channel 2
; PLL Control Register
; Multiplication Factor Intager Bits Mask (MFI0-MFI3)
; Multiplication Factor Bits Mask (MFN0-MFN6)
; Multiplication Factor Bits Mask (MFD0-MFD6)
; PreDivider Factor Bits Mask (PD0-PD3)
;
;
; Division Factor Bits Mask (DF0-DF2)
Freescale Semiconductor