78P2351-IGT/F Maxim Integrated Products, 78P2351-IGT/F Datasheet - Page 5

• Manufacturer Part Number: 78P2351-IGT/F
• Description: LINE INTERFACE UNIT 100-LQFP
• Manufacturer: Maxim Integrated Products

Specifications of 78P2351-IGT/F

• Number Of Channels Per Chip: 1
• Propagation Delay Time: 10 ns
• Supply Voltage (max): 3.45 V
• Supply Voltage (min): 3.15 V
• Maximum Operating Temperature: + 85 C
• Package / Case: LQFP-100
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Receive Loss of Signal
The 78P2351 includes a Loss of Signal (LOS)
detector.
signal is less than approximately 19dB below
nominal for approximately 110 UI, Receive Loss of
Signal is asserted. The Rx LOS signal is cleared
when
approximately 18dB below nominal for 110 UI.
In ECL mode, the LOS signal will be asserted when
there are no transitions for longer than 2.3µs. The
signal is cleared when there are more than 4
transitions in 32 UI. It is generally recommended to
use the LOS status signal from the optical
transceiver module.
During Rx LOS conditions, the receive clock will
remain on the last phase tap of the Rx DLL
outputting a stable clock while the receive data
outputs are squelched and held at logic ‘0’.
Receive Loss of Lock
The 78P2351 includes an optional Receiver Loss of
Lock detector that will flag if the recovered Rx clock
frequency differs from the reference clock by more
than ±100ppm in an interval greater than 420µs.
This condition is cleared when the frequencies are
less than ±100ppm off for more than 500µs.
TRANSMITTER OPERATION
At the media interface, the transmit driver generates
an analog signal for transmission through either a
transformer and 75Ω coaxial cable or directly to a
fiber optics transceiver for electrical to optical
conversion.
At the host interface, the 78P2351 provides a
number interface options for compatibility with most
off-the-shelf framers and custom ASICs.
selectable 4-bit parallel or nibble interface is
available with both slave or master timing options as
well a serial LVPECL interface with various timing
recovery modes.
Page: 5 of 42
Note: Rx Loss of Signal detection is disabled
during Local Loopback and Receive Monitor
Modes.
Notes:
1. During Rx Loss of Signal (RLOS), the Rx
2. For reliable operation, the LOLOR bit in the
the
Loss of Lock indicator is undefined and may
report either status.
Signal Control register should be toggled
upon power-up and configuration.
When the peak value of the received
received
signal
is
greater

2006 Teridian Semiconductor Corporation
than
A
Each of the serial NRZ transmit timing modes can be
configured in HW mode or SW mode as shown in
the table below.
Synchronous (Re-timing) Tx Serial Modes
In Figure 1, serial NRZ transmit data is input to the
SIDP/N pins at LVPECL levels. By default, the data
is latched in on the rising edge of SICKP.
integrated FIFO decouples the on chip and off chip
clocks and re-clocks the data using a clean
synthesized clock generated from the provided
reference clock.
provided by the framer/mapper IC must be source
synchronous with the provided reference clock when
the FIFO is to be used.
If an off-chip serial transmit clock is not available, as
in Figure 2, the 78P2351 can recover a Tx clock
from the serial NRZ data input and pass the data
through the clock decoupling FIFO. The data is then
re-clocked or re-timed using a clean synthesized
clock generated from the provided reference clock.
In this mode, the NRZ transmit data must be source
synchronous with the reference clock applied at
CKREFP/N.
System Reference Clock
Framer/
Serial
Mode
Synchronous
clock + data
Synchronous
data only
Plesiochronous
data only
Loop-timing
Mapper
Framer/
Mapper
System Reference Clock
Figure 1: Synchronous clock and data available
(Tx CDR bypassed, FIFO enabled)
Figure 2: Synchronous data only
(Tx CDR enabled, FIFO enabled)
140 / 155 MHz
140 / 155 MHz
140 / 155 MHz
NRZ
NRZ
NRZ
NRZ
HW Control Pins SW Control Bits
SDI_PAR
Low
Low
Low
n/a
As such, the SICKP/N clock
SIDP/N
SOCKP/N
SODP/N
SIDP/N
SICKP/N
SOCKP/N
SODP/N
OC-3/ STM1-E/ E4 LIU
78P2351
CKREFP/N
CKMODE
Floating
CKREFP/N
TDK
78P2351
High
Low
n/a
TDK
Single Channel
CMIP/N
RXP/N
CMIP/N
RXP/N
PAR
CMI
CMI
X
0
0
0
CMI
CMI
78P2351
XFMR
XFMR
SMOD[1:0]
XFMR
XFMR
0 0
1 0
0 1
Rev. 2.4
11
Coax
Coax
Coax
Coax
An