DS90UR908QSQE/NOPB National Semiconductor, DS90UR908QSQE/NOPB Datasheet - Page 25

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DS90UR908QSQE/NOPB

Manufacturer Part Number
DS90UR908QSQE/NOPB
Description
IC DESERIALIZER 65MHZ 48LLP
Manufacturer
National Semiconductor
Datasheet

Specifications of DS90UR908QSQE/NOPB

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DS90UR908QSQE/NOPBTR

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POWER UP REQUIREMENTS AND PDB PIN
The VDD (V
faster than 1.5 ms with a monotonic rise. Supplies may power
up in any order, however device operation should be initiated
only after all supplies are in their valid operating ranges. The
optional serial bus address selection is done upon power up
also. Thus, if using this optional feature, the PDB signal must
be delayed to allow time for the ID setting to occur. The delay
maybe done by simply holding the PDB pin at a Low, or with
an external RC delay based off the V
need to lag the others in time. If the PDB pin is pulled to
V
cap to GND to delay the PDB input signal.
TRANSMISSION MEDIA
The FPD-Link II chipset is intended to be used in a point-to-
point configuration, through a PCB trace, or through twisted
pair cable. The serializer and deserializer provide internal ter-
minations providing a clean signaling environment. The inter-
connect for LVDS should present a differential impedance of
DDIO
DS90UR908Q
, it is recommended to use a 10 kΩ pull-up and a 10 uF
FPD-Link
Settings
TxOUT3
TxOUT2
TxOUT1
TxOUT0
DDn
), V
DDTX
and V
Bit Number
N/A
Bit 26
Bit 25
Bit 24
Bit 23
Bit 22
Bit 21
Bit 20
Bit 19
Bit 18
Bit 17
Bit 16
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
DDIO
MAPSEL = 0
DDIO
supply ramps should be
rail which would then
TABLE 9. Alternate Color / Data Mapping
RGB (LSB
Example)
DE
HS
G1
G0
R1
R0
VS
G7
G6
G5
G4
G3
G2
R7
R6
R5
R4
R3
R2
B1
B0
B7
B6
B5
B4
B3
B2
CONFIG [1:0] = 00
25
DS90UR905Q
N/ADIN12
100 Ohms. Use cables and connectors that have matched
differential impedance to minimize impedance discontinuities.
Shielded or un-shielded cables may be used depending upon
the noise environment and application requirements.
LIVE LINK INSERTION
The serializer and deserializer devices support live pluggable
applications. The automatic receiver lock to random data
“plug & go” hot insertion capability allows the DS90UR908Q
to attain lock to the active data stream during a live insertion
event.
ALTERNATE COLOR / DATA MAPPING
Color Mapped data Pin names are provided to specify a rec-
ommended mapping for 24-bit and 18-bit Applications. When
connecting to earlier generations of FPD-Link II serializer de-
vices, a color mapping review is recommended to ensure the
correct connectivity is obtained.
for interfacing between DS90UR908Q and different deserial-
izers.
DE
HS
B1
B0
G1
G0
R1
R0
VS
B7
B6
B5
B4
B3
B2
G7
G6
G5
G4
G3
G2
R7
R6
R5
R4
R3
R2
DS90UR241 DS99R421
CONFIG [1:0] = 10
DIN20
DIN19
DIN18
DIN17
DIN16
DIN15
DIN14
DIN13
DIN12
DIN11
DIN10
DIN23
DIN22
DIN21
DIN9
DIN8
DIN7
DIN6
DIN5
DIN4
DIN3
DIN2
DIN1
DIN0
RxIN2
RxIN1
RxIN0
OS2
OS1
OS0
Table 9
N/A
CONFIG [1:0] = 11
provides examples
DS90C241
DIN20
DIN19
DIN18
DIN17
DIN16
DIN15
DIN14
DIN13
DIN12
DIN11
DIN10
DIN23
DIN22
DIN21
DIN9
DIN8
DIN7
DIN6
DIN5
DIN4
DIN3
DIN2
DIN1
DIN0
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