X28HC64J-12 Intersil, X28HC64J-12 Datasheet - Page 12

IC EEPROM 64KBIT 120NS 32PLCC

X28HC64J-12

Manufacturer Part Number
X28HC64J-12
Description
IC EEPROM 64KBIT 120NS 32PLCC
Manufacturer
Intersil
Datasheet

Specifications of X28HC64J-12

Format - Memory
EEPROMs - Parallel
Memory Type
EEPROM
Memory Size
64K (8K x 8)
Speed
120ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
32-LCC (J-Lead)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Write Cycle Limits
NOTES:
WE Controlled Write Cycle
Write Cycle Time (Note 7)
Address Setup Time
Address Hold Time
Write Setup Time
Write Hold Time
CE Pulse Width
OE High Setup Time
OE High Hold Time
WE Pulse Width
WE HIGH Recovery (Note 8)
Data Valid (Note 8)
Data Setup
Data Hold
Delay to Next Write (Note 8)
Byte Load Cycle
7. t
8. t
DATA OUT
ADDRESS
requires to automatically complete the internal write operation.
WC
WPH
DATA IN
is the minimum cycle time to be allowed from the system perspective unless polling techniques are used. It is the maximum time the device
and t
WE
CE
OE
DW
are periodically sampled and not 100% tested.
PARAMETER
Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits
established by characterization and are not production tested.
12
t
AS
t
OES
t
CS
t
DV
t
AH
SYMBOL
t
WP
t
t
t
t
t
t
t
WPH
t
t
t
t
OES
OEH
t
t
t
X28HC64
t
BLC
WC
CW
WP
DW
AS
AH
CS
CH
DV
DS
DH
t
DS
DATA VALID
t
OEH
HIGH Z
0.15
MIN
50
50
50
50
50
10
0
0
0
0
0
0
t
t
WC
t
DH
CH
(Note 3)
TYP
2
MAX
100
5
1
August 28, 2009
UNIT
ms
µs
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
FN8109.2

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