ZL6100EVAL1Z Intersil, ZL6100EVAL1Z Datasheet - Page 13

• Manufacturer Part Number: ZL6100EVAL1Z
• Description: EVAL BOARD USB ZL6100
• Manufacturer: Intersil

Specifications of ZL6100EVAL1Z

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DOSA VOLTAGE TRIM MODE
On a DOSA module, the V
To maintain DOSA compatibility, the same scheme is used
as with a POLA module except the 10kΩ resistor is replaced
with a 8.66k resistor as shown in Figure 11.
R
SET
TABLE 4. POLA MODE V
0.700
0.752
0.758
0.765
0.772
0.790
0.800
0.821
0.834
0.848
0.880
0.899
0.919
0.965
V
(V)
OUT
=
--------------------------------- -
V
OUT
FIGURE 11. R
R1 = R
6900
IN SERIES WITH
–
0.69V
MODULE
RESISTOR
DOSA
SET
10kΩ
R
(kΩ)
90.9
82.5
75.0
56.2
51.1
46.4
42.2
34.8
31.6
28.7
23.7
162
100
110
SET
+ 10k)
110 k
SET
OUT
OUT
ON A DOSA MODULE
Ω
13
V0
SETTINGS (R0 = 110k,
setting follows Equation 4:
ZL6100
V1
0.991
1.000
1.100
1.158
1.200
1.250
1.500
1.669
1.800
2.295
2.506
3.300
5.000
V
(V)
R
OUT
8.66 k
SET
Ω
WITH 10kΩ
RESISTOR
IN SERIES
0.162
R
(kΩ)
21.5
19.6
16.2
13.3
12.1
9.09
7.50
4.64
2.87
2.37
1.21
5.6
SET
(EQ. 4)
ZL6100
The DOSA mode V
Start-up Procedure
The ZL6100 follows a specific internal start-up procedure
after power is applied to the VDD pin. Table 6 describes the
start-up sequence.
If the device is to be synchronized to an external clock source,
the clock frequency must be stable prior to asserting the EN
pin. The device requires approximately 5ms to 10ms to check
for specific values stored in its internal memory. If the user has
stored values in memory, those values will be loaded. The
device will then check the status of all multi-mode pins and
load the values associated with the pin settings.
Once this process is completed, the device is ready to
accept commands via the I
device is ready to be enabled. Once enabled, the device
requires approximately 2ms before its output voltage may be
allowed to start its ramp-up process. If a soft-start delay
period less than 2ms has been configured (using DLY pins
or PMBus commands), the device will default to a 2ms delay
period. If a delay period greater than 2ms is configured, the
device will wait for the configured delay period prior to
starting to ramp its output.
After the delay period has expired, the output will begin to
ramp towards its target voltage according to the
pre-configured soft-start ramp time that has been set using
the SS pin. It should be noted that if the EN pin is tied to
VDD, the device will still require approx 5ms to 10ms before
the output can begin its ramp-up as described in Table 6.
TABLE 5. DOSA MODE V
0.700
0.752
0.758
0.765
0.772
0.790
0.800
0.821
0.834
0.848
0.880
0.899
0.919
0.965
V
(V)
OUT
R1 = R
WITH 8.66kΩ
RESISTOR
IN SERIES
R
(kΩ)
90.9
82.5
75.0
57.6
52.3
47.5
43.2
36.5
33.2
30.1
25.5
SET
162
113
100
OUT
SET
+ 8.66k)
settings are listed in Table 5.
OUT
2
C/SMBus interface and the
SETTINGS (R0 = 110k,
0.991
1.000
1.100
1.158
1.200
1.250
1.500
1.669
1.800
2.295
2.506
3.300
5.000
V
(V)
OUT
WITH 8.66kΩ
RESISTOR
IN SERIES
R
(kΩ)
22.6
21.0
17.8
14.7
13.3
10.5
8.87
6.98
6.04
4.32
3.74
2.61
1.50
December 15, 2010
SET
FN6876.2