ZL6100EVAL1Z Intersil, ZL6100EVAL1Z Datasheet - Page 18

• Manufacturer Part Number: ZL6100EVAL1Z
• Description: EVAL BOARD USB ZL6100
• Manufacturer: Intersil

Specifications of ZL6100EVAL1Z

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

As a starting point, apportion one-half of the output ripple
voltage to the capacitor ESR and the other half to
capacitance, as shown in Equations 10 and 11:
Use these values to make an initial capacitor selection, using
a single capacitor or several capacitors in parallel.
After a capacitor has been selected, the resulting output
voltage ripple can be calculated using Equation 12:
Because each part of this equation was made to be less than
or equal to half of the allowed output ripple voltage, the V
should be less than the desired maximum output ripple.
INPUT CAPACITOR
It is highly recommended that dedicated input capacitors be
used in any point-of-load design, even when the supply is
powered from a heavily filtered 5V or 12V “bulk” supply from
an off-line power supply. This is because of the high RMS
ripple current that is drawn by the buck converter topology.
This ripple (I
Without capacitive filtering near the power supply circuit, this
current would flow through the supply bus and return planes,
coupling noise into other system circuitry. The input capacitors
should be rated at 1.2x the ripple current calculated above to
avoid overheating of the capacitors due to the high ripple
current, which can cause premature failure. Ceramic
capacitors with x7R or x5R dielectric with low ESR and 1.1x
the maximum expected input voltage are recommended.
BOOTSTRAP CAPACITOR SELECTION
The high-side driver boost circuit utilizes an external Schottky
diode (D
sufficient gate drive for the high-side MOSFET driver. D
should be a 20mA, 30V Schottky diode or equivalent device
and C
QL SELECTION
The bottom MOSFET should be selected primarily based on
the device’s r
charge. To choose QL, use Equations 14, 15 and 16, and
allow 2% to 5% of the output power to be dissipated in the
V
C
ESR
I
CINrms
orip
OUT
B
=
=
=
should be a 1µF ceramic type rated for at least 6.3V.
B
=
I
2
) and an external bootstrap capacitor (C
8
opp
V
×
I
×
CINrms
OUT
orip
I
DS(ON)
×
f
opp
sw
I
ESR
×
opp
×
) can be determined from Equation 13:
and secondarily based on its gate
V
D
+
orip
2
×
8
×
1 ( D
f
−
18
sw
I
opp
×
)
C
OUT
B
) to supply
(EQ. 10)
(EQ. 12)
(EQ. 13)
(EQ. 11)
B
orip
ZL6100
r
ratios will be closer to 5%):
Calculate the RMS current in QL as shown in Equation 15:
Calculate the desired maximum r
Equation 16:
Note that the r
is measured at +25°C. The actual r
application will be much higher. For example, a Vishay
Si7114 MOSFET with a junction temperature of +125°C has
an r
a candidate MOSFET, and calculate the required gate drive
current as shown in Equation 17:
Keep in mind that the total allowed gate drive current for both
QH and QL is 80mA.
MOSFETs with lower r
charge requirements, which increases the current and
resulting power required to turn them on and off. Since the
MOSFET gate drive circuits are integrated in the ZL6100,
this power is dissipated in the ZL6100 according to
Equation 18:
QH SELECTION
In addition to the r
has switching loss. The procedure to select QH is similar to
the procedure for QL. First, assign 2% to 5% of the output
power to be dissipated in the r
Equation 18. As was done with QL, calculate the RMS
current as shown in Equation 19:
Calculate a starting r
5%
Select a MOSFET and calculate the resulting gate drive
current. Verify that the combined gate drive current from QL
and QH does not exceed 80mA.
P
I
R
I
P
I
P
DS(ON)
R
botrms
toprms
QL
g
QL
QH
DS
DS
DS(ON)
=
(
(
= 05
=
ON
= 05
ON
f
. 0
=
of QL (lower output voltages and higher step-down
=
SW
f
)
. 0
)
sw
=
I
=
I
that is 1.4x higher than the value at +25°C. Select
Lrms
×
×
Lrms
(
(
×
I
Q
Q
×
I
DS(ON)
botrms
V
toprms
P
P
×
V
g
g
×
OUT
QL
QH
OUT
×
DS(ON)
V
1
)
D
DS(ON)
)
×
2
2
−
given in the manufacturer’s datasheet
INM
×
DS(ON)
I
D
OUT
I
loss and gate charge loss, QH also
OUT
as follows, in this example using
tend to have higher gate
DS(ON)
DS(ON)
DS(ON)
of QH using
as shown in
in the end-use
December 15, 2010
(EQ. 20)
(EQ. 21)
(EQ. 14)
(EQ. 15)
(EQ. 16)
(EQ. 17)
(EQ. 18)
(EQ. 19)
FN6876.2