ZL6100EVAL1Z Intersil, ZL6100EVAL1Z Datasheet - Page 7

• Manufacturer Part Number: ZL6100EVAL1Z
• Description: EVAL BOARD USB ZL6100
• Manufacturer: Intersil

Specifications of ZL6100EVAL1Z

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pin Descriptions
NOTES:
19. I = Input, O = Output, PWR = Power or Ground. M = Multi-mode pins.
20. The SYNC pin can be used as a logic pin, a clock input or a clock output.
21. V
NUMBER
ePad
PIN
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
DD
is measured internally and the value is used to modify the PWM loop gain.
(Note 21)
LABEL
XTEMP
ISENA
PGND
SGND
MGN
DLY0
DLY1
DDC
VDD
CFG
BST
V25
SW
VR
GH
EN
PG
GL
(Continued)
(Note 19)
TYPE
PWR
PWR
PWR
PWR
PWR
PWR
PWR
I, M
I, M
I/O
O
O
O
I
I
I
I
7
Differential voltage input for current limit. High voltage tolerant.
Internal 5V reference used to power internal drivers.
Low side FET gate drive.
Power ground. Connect to low impedance ground plane.
Drive train switch node.
High-side FET gate drive.
High-side drive boost voltage.
Supply voltage.
Internal 2.5V reference used to power internal circuitry.
External temperature sensor input. Connect to external 2N3904 diode connected transistor.
Digital-DC Bus. (Open Drain) Communication between Zilker Labs devices.
Signal that enables margining of output voltage.
Configuration pin. Used to control the switching phase offset, sequencing and other management
features.
Enable input. Active high signal enables PWM switching.
Soft-start delay select. Sets the delay from when EN is asserted until the output voltage starts to ramp.
Power-good output.
Exposed thermal pad. Common return for analog signals; internal connection to SGND. Connect to low
impedance ground plane.
ZL6100
DESCRIPTION
December 15, 2010
FN6876.2