M4A5-128/64-10YC LATTICE SEMICONDUCTOR, M4A5-128/64-10YC Datasheet - Page 16

IC, MACH4 ISP EEPLD, PQFP100, 5.25V

M4A5-128/64-10YC

Manufacturer Part Number
M4A5-128/64-10YC
Description
IC, MACH4 ISP EEPLD, PQFP100, 5.25V
Manufacturer
LATTICE SEMICONDUCTOR
Series
IspMACH 4Ar
Datasheet

Specifications of M4A5-128/64-10YC

No. Of Macrocells
128
No. Of I/o's
64
Propagation Delay
10ns
Frequency
100MHz
Supply Voltage Range
4.75V To 5.25V
Operating Temperature Range
0°C To +70°C

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4
A reset/preset swapping feature in each macrocell allows for reset and preset to be exchanged,
providing flexibility. In asynchronous mode (Figure 8), a single individual product term is
provided for initialization. It can be selected to control reset or preset.
Note that the reset/preset swapping selection feature effects power-up reset as well. The
initialization functionality of the flip-flops is illustrated in Table 13. The macrocell sends its data
to the output switch matrix and the input switch matrix. The output switch matrix can route this
data to an output if so desired. The input switch matrix can send the signal back to the central
switch matrix as feedback.
Note:
1. Transparent latch is unaffected by AR, AP
Output Switch Matrix
The output switch matrix allows macrocells to be connected to any of several I/O cells within a
PAL block. This provides high flexibility in determining pinout and allows design changes to
occur without effecting pinout.
In MACH 4 and MACH 4A devices with 2:1 Macrocell-I/O cell ratio, each PAL block has twice as
many macrocells as I/O cells. The MACH 4 output switch matrix allows for half of the macrocells
to drive I/O cells within a PAL block, in combinations according to Figure 9. Each I/O cell can
choose from eight macrocells; each macrocell has a choice of four I/O cells. The MACH 4 and
MACH 4A devices with 1:1 Macrocell-I/O cell ratio allow each macrocell to drive one of eight
I/O cells (Figure 9).
16
Product Term
Individual
Reset
Power-Up
a. Reset
Reset
Figure 8. Asynchronous Mode Initialization Configurations
Table 13. Asynchronous Reset/Preset Operation
AR
D/L/T
0
0
1
1
AP
AR
Q
17466G-014
AP
0
1
0
1
MACH 4 Family
Product Term
CLK/LE
Individual
X
X
X
X
Preset
1
Power-Up
See Table 12
Preset
Q+
1
0
0
b. Preset
D/L/T
AP
AR
17466G-015
Q

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