BS62LV256SIP55 BSI (BRILLIANCE SEMICONDUCTOR), BS62LV256SIP55 Datasheet - Page 2

SRAM 256K, 32KX8, 2.4-5.5V, SOP28

BS62LV256SIP55

Manufacturer Part Number
BS62LV256SIP55
Description
SRAM 256K, 32KX8, 2.4-5.5V, SOP28
Manufacturer
BSI (BRILLIANCE SEMICONDUCTOR)
Datasheet

Specifications of BS62LV256SIP55

Memory Size
256Kbit
Access Time
55ns
Supply Voltage Range
2.4V To 5.5V
Memory Case Style
SOP
No. Of Pins
28
Operating Temperature Range
-40°C To +85°C
Operating Temperature Max
85°C
Operating
RoHS Compliant
Memory Configuration
32K X 8
Rohs Compliant
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
BS62LV256SIP55
Manufacturer:
BSI
Quantity:
4 130
Part Number:
BS62LV256SIP55
Manufacturer:
BSI
Quantity:
20 000
n PIN DESCRIPTIONS
n TRUTH TABLE
n ABSOLUTE MAXIMUM RATINGS
R0201-BS62LV256
NOTES: H means V
1. Stresses greater than those listed under ABSOLUTE
2. –2.0V in case of AC pulse width less than 30 ns.
SYMBOL
MAXIMUM RATINGS may cause permanent damage to the
device. This is a stress rating only and functional operation of
the device at these or any other conditions above those
indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
A0-A14 Address Input
CE Chip Enable Input
WE Write Enable Input
OE Output Enable Input
DQ0-DQ7 Data Input/Output
Ports
V
GND
V
T
T
I
CC
TERM
P
OUT
BIAS
STG
Output Disabled
(Power Down)
T
Not selected
MODE
Read
Write
Terminal Voltage with
Respect to GND
Temperature Under
Bias
Storage Temperature
Power Dissipation
DC Output Current
PARAMETER
IH
; L means V
Name
CE
IL
H
L
L
L
; X means don’t care (Must be V
-0.5
-40 to +125
-60 to +150
RATING
(2)
1.0
(1)
20
to 7.0
WE
H
H
X
L
These 15 address inputs select one of the 32,768 x 8-bit in the RAM
CE is active LOW. Chip enable must be active when data read form or write to the
device. If chip enable is not active, the device is deselected and is in standby power
mode. The DQ pins will be in the high impedance state when the device is deselected.
The write enable input is active LOW and controls read and write operations. With the
chip selected, when WE is HIGH and OE is LOW, output data will be present on the
DQ pins; when WE is LOW, the data present on the DQ pins will be written into the
selected memory location.
The output enable input is active LOW. If the output enable is active while the chip is
selected and the write enable is inactive, data will be present on the DQ pins and they
will be enabled. The DQ pins will be in the high impendence state when OE is inactive.
There 8 bi-directional ports are used to read data from or write data into the RAM.
Power Supply
Ground
UNITS
mA
O
O
W
V
C
C
OE
X
H
X
L
2
IH
or V
n OPERATING RANGE
n CAPACITANCE
IL
1. This parameter is guaranteed and not 100% tested.
SYMBOL PAMAMETER CONDITIONS MAX. UNITS
state)
C
C
Commercial
IO
Industrial
IN
I/O OPERATION
RANG
Input
Capacitance
Input/Output
Capacitance
High Z
High Z
D
Function
D
OUT
IN
(1)
TEMPERATURE
(T
-40
0
A
O
AMBIENT
O
C to + 70
= 25
C to + 85
V
O
V
C, f = 1.0MHz)
I/O
IN
BS62LV256
O
= 0V
= 0V
C
O
V
C
CC
I
CCSB
CURRENT
I
I
I
, I
CC
CC
CC
Revision
Sep.
2.4V ~ 5.5V
2.4V ~ 5.5V
CCSB1
6
8
V
CC
pF
pF
2006
2.6

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