PIC16F886-E/SS Microchip Technology, PIC16F886-E/SS Datasheet - Page 8

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PIC16F886-E/SS

Manufacturer Part Number
PIC16F886-E/SS
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F886-E/SS

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SSOP
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
MSSP, EUSART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
24
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM164123, DM164120-3, DV164122
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM164123 - KIT MANAGEMENT SYSTEM PICDEM
Lead Free Status / Rohs Status
 Details
PIC16F88X
FIGURE 3:
FIGURE 4:
DS80302F-page 8
SDA
SCL
SDA
SCL
Master
Master
Work around
Set the communication speed to match the
slowest device on the bus. This ensures that no
slave device will perform clock stretching.
It
communication speed to match the device being
addressed by modifying the BRG register.
However, the behavior of slower slave devices
must be understood and speed adjustments made
such that no slave performs clock stretching.
Affected Silicon Revisions
PIC16F882
PIC16F883/PIC16F884
PIC16F886/PIC16F887
Slave
Slave
A0
A0
A2
X
X
X
is
possible
BRG Period
BRG Period
ACTUAL (INCORRECT) OPERATION WITH CLOCK STRETCHING – EXAMPLE 1
ACTUAL (INCORRECT) OPERATION WITH CLOCK STRETCHING – EXAMPLE 2
to
dynamically
BRG Period
BRG Period
adjust
BRG Period
BRG Period
the
BRG Period
BRG Period
BRG Period
BRG Period
© 2009 Microchip Technology Inc.
BRG Period
BRG Period

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