MFRC52302HN1,151 NXP Semiconductors, MFRC52302HN1,151 Datasheet - Page 41

• Manufacturer Part Number: MFRC52302HN1,151
• Description: IC READER 32-HVQFN
• Manufacturer: NXP Semiconductors
• Series: MIFARE®r

Specifications of MFRC52302HN1,151

• Rf Type: Read / Write
• Frequency: 13.56MHz
• Features: ISO14443-A, ISO14443-B
• Package / Case: 32-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 935293911151

NXP Semiconductors
MFRC523
Product data sheet
COMPANY PUBLIC
9.2.1.9 Status2Reg register
Table 37.
Contains status bits of the receiver, transmitter and data mode detector.
Table 38.
Table 39.
Bit Symbol
7
6
5
4
3
2
1
0
Bit
Symbol
Access
Bit
7
reserved
CRCOk
CRCReady 1
IRq
TRunning
reserved
HiAlert
LoAlert
Symbol
TempSensClear
TempSensClear
Status1Reg register bit descriptions
Status2Reg register (address 08h); reset value: 00h bit allocation
Status2Reg register bit descriptions
R/W
All information provided in this document is subject to legal disclaimers.
7
Value Description
-
1
-
1
-
1
1
Rev. 3.7 — 8 November 2011
reserved for future use
the CRC result is zero
the CRC calculation has finished; only valid for the CRC coprocessor
calculation using the CalcCRC command
indicates if any interrupt source requests attention with respect to the
setting of the interrupt enable bits: see the ComIEnReg and DivIEnReg
registers
MFRC523’s timer unit is running, i.e. the timer will decrement the
TCounterValReg register with the next timer clock
Remark: in gated mode, the TRunning bit is set to logic 1 when the
timer is enabled by TModeReg register’s TGated[1:0] bits; this bit is not
influenced by the gated signal
reserved for future use
the alert level for the number of bytes in the FIFO buffer
(FIFOLength[6:0]) is:
otherwise value = logic 0
Example:
the alert level for number of bytes in the FIFO buffer (FIFOLength[6:0])
is:
Example:
LoAlert
the CRCOk bit is undefined for data transmission and reception: use
the ErrorReg register’s CRCErr bit
indicates the status of the CRC coprocessor, during calculation the
value changes to logic 0, when the calculation is done correctly the
value changes to logic 1
FIFOLength = 60, WaterLevel = 4 then HiAlert = logic 1
FIFOLength = 59, WaterLevel = 4 then HiAlert = logic 0
FIFOLength = 4, WaterLevel = 4 then LoAlert = logic 1
FIFOLength = 5, WaterLevel = 4 then LoAlert = logic 0
I
2
Value
1
CForceHS
R/W
115237
6
=
FIFOLength WaterLevel
Description
clears the temperature error if the temperature is below the
alarm limit of 125 C
5
reserved
HiAlert
-

4
=

MFCrypto1On
64 FIFOLength
–
otherwise value = logic 0
D
3
Contactless reader IC
MFRC523
 WaterLevel

2
ModemState[2:0]
© NXP B.V. 2011. All rights reserved.
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