MFRC52302HN1,151 NXP Semiconductors, MFRC52302HN1,151 Datasheet - Page 64

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MFRC52302HN1,151

Manufacturer Part Number
MFRC52302HN1,151
Description
IC READER 32-HVQFN
Manufacturer
NXP Semiconductors
Series
MIFARE®r
Datasheet

Specifications of MFRC52302HN1,151

Rf Type
Read / Write
Frequency
13.56MHz
Features
ISO14443-A, ISO14443-B
Package / Case
32-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935293911151
NXP Semiconductors
MFRC523
Product data sheet
COMPANY PUBLIC
9.2.4.8 VersionReg register
9.2.4.9 AnalogTestReg register
Table 131. AutoTestReg register bit descriptions
Shows the MFRC523 software version.
Table 132. VersionReg register (address 37h); reset value: xxh bit allocation
Table 133. VersionReg register bit descriptions
Determines the analog output test signal at, and status of, pins AUX1 and AUX2.
Table 134. AnalogTestReg register (address 38h); reset value: 00h bit allocation
Bit
7
6
5
4
3 to 0
Bit
Symbol
Access
Bit
7 to 0
Bit
Symbol
Access
Symbol
reserved
AmpRcv
reserved
EOFSOFAdjust 0
SelfTest[3:0]
Symbol
Version[7:0]
7
7
All information provided in this document is subject to legal disclaimers.
AnalogSelAux1[3:0]
Rev. 3.7 — 8 November 2011
6
6
Value Description
-
1
-
1
-
Description
indicates current MFRC523 software version
Remark: the current version of the MFRC523 is B1h or B2h
R/W
115237
reserved for production tests
internal signal processing in the receiver chain is performed
non-linearly which increases the operating distance in
communication modes at 106 kBd
Remark: due to non-linearity, the effect of the RxThresholdReg
register’s MinLevel[3:0] and the CollLevel[2:0] values is also
non-linear
reserved for production tests
If set to logic 0 and the EOFSOFwidth bit is set to logic 1 it
results in the maximum length of SOF and EOF according to
ISO/IEC 14443 B
If set to logic 0 and the EOFSOFwidth bit is set to logic 0 it
results in the minimum length of SOF and EOF according to
ISO/IEC 14443 B
If this bit is set to logic 1 and the EOFSOFwidth bit is logic 1, it
results in
enables the digital self-test. The self-test can also be started by
the CalcCRC command; see
command” on page
Remark: for default operation the self-test must be disabled
by 0000b
SOF high = (2 ETU + 8 cycles) / f
SOF low = (11 ETU  8 cycles) / f
EOF low = (11 ETU  8 cycles) / f
5
5
4
4
Version[7:0]
R
69. Self-test is enabled by 1001b.
3
3
Section 10.3.1.4 “CalcCRC
AnalogSelAux2[3:0]
clk
clk
clk
2
2
Contactless reader IC
R/W
MFRC523
© NXP B.V. 2011. All rights reserved.
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