ST7263-EMU2 STMicroelectronics, ST7263-EMU2 Datasheet - Page 60

no-image

ST7263-EMU2

Manufacturer Part Number
ST7263-EMU2
Description
MCU, MPU & DSP Development Tools ST7 Emulator Board
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7263-EMU2

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ST7263
SERIAL COMMUNICATIONS INTERFACE (Cont’d)
5.5.5 Low Power Modes
5.5.6 Interrupts
The SCI interrupt events are connected to the
same interrupt vector (see Interrupts chapter).
These events generate an interrupt if the corre-
sponding Enable Control Bit is set and the inter-
60/109
Mode
WAIT
HALT
Transmit Data Register Empty
Transmission Complete
Received Data Ready to be Read
Overrrun Error Detected
Idle Line Detected
In Halt mode, the SCI stops transmitting/receiving until Halt mode is exited.
Description
No effect on SCI.
SCI interrupts exit from Wait mode.
SCI registers are frozen.
Interrupt Event
rupt mask in the CC register is reset (RIM instruc-
tion).
Event
RDRF
TDRE
Flag
IDLE
OR
TC
Control
Enable
TCIE
ILIE
Bit
RIE
TIE
from
Wait
Exit
Yes
Yes
Yes
Yes
Yes
from
Exit
Halt
No
No
No
No
No

Related parts for ST7263-EMU2