ST7263-EMU2 STMicroelectronics, ST7263-EMU2 Datasheet - Page 85

• Manufacturer Part Number: ST7263-EMU2
• Description: MCU, MPU & DSP Development Tools ST7 Emulator Board
• Manufacturer: STMicroelectronics

Specifications of ST7263-EMU2

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8-BIT A/D CONVERTER (ADC) (Cont’d)
5.8.3 Functional Description
The high level reference voltage V
connected externally to the V
reference voltage V
nally to the V
vice pin out description) high and low level refer-
ence voltages are internally connected to the V
and V
Conversion accuracy may therefore be degraded
by voltage drops and noise in the event of heavily
loaded or badly decoupled power supply lines.
Figure 43. Recommended Ext. Connections
Characteristics:
The conversion is monotonic, meaning the result
never decreases if the analog input does not and
never increases if the analog input does not.
If input voltage is greater than or equal to V
(voltage reference high) then results = FFh (full
scale) without overflow indication.
If input voltage
the results = 00h.
The conversion time is 64 CPU clock cycles in-
cluding a sampling time of 31.5 CPU clock cycles.
R
for an analog input signal. If the impedance is too
high, this will result in a loss of accuracy due to
leakage and sampling not being completed in the
alloted time.
The A/D converter is linear and the digital result of
the conversion is given by the formula:
Where Reference Voltage is V
AIN
is the maximum recommended impedance
SS
Digital result =
V
pins.
DD
V
AIN
SS
pin. In some devices (refer to de-
R
V
AIN
SS
SSA
(voltage reference low) then
255 x Input Voltage
Reference Voltage
must be connected exter-
0.1µF
DD
DD
pin. The low level
V
V
Px.x/AINx
- V
DDA
SSA
DDA
SS
ST7
.
must be
DD
DD
The accuracy of the conversion is described in the
Electrical Characteristics Section.
Procedure:
Refer to the CSR and DR register description sec-
tion for the bit definitions.
Each analog input pin must be configured as input,
no pull-up, no interrupt. Refer to the “I/O Ports”
chapter. Using these pins as analog inputs does
not affect the ability of the port to be read as a logic
input.
In the CSR register:
When a conversion is complete
A write to the CSR register aborts the current con-
version, resets the COCO bit and starts a new
conversion.
5.8.4 Low Power Modes
Note: The A/D converter may be disabled by re-
setting the ADON bit. This feature allows reduced
power consumption when no conversion is need-
ed.
5.8.5 Interrupts
None.
Mode
WAIT
HALT
– Select the CH2 to CH0 bits to assign the ana-
– Set the ADON bit. Then the A/D converter is
– The COCO bit is set by hardware.
– No interrupt is generated.
– The result is in the DR register.
log channel to convert. Refer to
Channel
enabled after a stabilization time (typically 30
µs). It then performs a continuous conversion
of the selected channel.
Description
No effect on A/D Converter
A/D Converter disabled.
After wakeup from Halt mode, the A/D
Converter requires a stabilisation time
before accurate conversions can be
performed.
Selection.
Table 21
ST7263
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