AD5273BRJZ1-REEL7 Analog Devices Inc, AD5273BRJZ1-REEL7 Datasheet - Page 13

IC,Digital Potentiometer,TSSOP,8PIN,PLASTIC

AD5273BRJZ1-REEL7

Manufacturer Part Number
AD5273BRJZ1-REEL7
Description
IC,Digital Potentiometer,TSSOP,8PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5273BRJZ1-REEL7

Package / Case
SOT-23-8
Mounting Type
Surface Mount
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 105°C
Temperature Coefficient
300 ppm/°C Typical
Interface
I²C, 2-Wire Serial
Resistance In Ohms
1.00K
Number Of Circuits
1
Memory Type
Non-Volatile
Taps
64
Number Of Elements
1
# Of Taps
64
Resistance (max)
1KOhm
Power Supply Requirement
Single
Interface Type
Serial (2-Wire/I2C)
Single Supply Voltage (typ)
5V
Dual Supply Voltage (typ)
Not RequiredV
Single Supply Voltage (min)
2.7V
Single Supply Voltage (max)
5.5V
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD5273BRJZ1-REEL7
Manufacturer:
ADI
Quantity:
2 396
THEORY OF OPERATION
The AD5273 is a one-time programmable (OTP), set-and-forget,
6-bit digital potentiometer. The AD5273 allows unlimited 6-bit
adjustments prior to the OTP. OTP technology is a proven cost-
effective alternative over EEMEM in one-time memory
programming applications. The AD5273 employs fuse link
technology to achieve the memory retention of the resistance
setting function. It comprises six data fuses, which control the
address decoder for programming the RDAC, one user mode
test fuse for checking setup error, and one programming lock
fuse for disabling any further programming once the data fuses
are programmed correctly.
ONE-TIME PROGRAMMING
Prior to OTP activation, the AD5273 presets to midscale dur-
ing power-on. After the wiper is set to the desired position, the
resistance can be permanently set by programming the T bit
and the one-time V
properly (see Figure 31). The fuse link technology of the
SDA Bit Definitions and Descriptions
S = start condition.
P = stop condition.
A = acknowledge.
X = don’t care.
T = OTP programming bit. Logic 1 programs wiper position
permanently.
D5, D4, D3, D2, D1, D0 = data bits.
S
0
1
SLAVE ADDRESS BYTE
0
DD_OTP
1
S
to high and by coding the part
SDA
SCL
1
0
0
1
AD0
SLAVE ADDRESS BYTE
0
0
CONTROL BLOCK
PROGRAM/TEST
I
2
1
C INTERFACE
ONE-TIME
A
COMPARATOR
1
T
Figure 30. Detailed Functional Block Diagram
0
Figure 31. SDA Write Mode Bit Format
Figure 32. SDA Read Mode Bit Format
X
AD0
INSTRUCTION BYTE
X
Rev. G | Page 13 of 24
1
X
A
FUSES
REG.
DAC
X
EN
E1
X
AD5273 requires a V
blow the fuses to achieve a given nonvolatile setting. During
operation, however, V
system supply that is lower than 4.75 V requires an external
supply for OTP. The user is allowed only one attempt to blow
the fuses. If the user fails to blow the fuses on the first attempt,
the fuse structure may change such that they can never be
blown, regardless of the energy applied during subsequent events.
For details, see the Power Supply Considerations section.
The device control circuit has two validation bits, E1 and E0,
that can be read back in the read mode to check the program-
ming status, as shown in Figure 32. Users should always read
back the validation bits to ensure that the fuses are properly
blown. After the fuses have been blown, all fuse latches are
enabled upon subsequent power-on; therefore, the output
corresponds to the stored setting. Figure 30 shows a detailed
functional block diagram.
E1, E0 = OTP validation bits.
AD0 = I
AD5273s to be addressed.
E0
X
MUX
D5
0, 0 = ready to program.
0, 1 = test fuse not blown successfully. (For factory setup
checking purpose only. Users should not see these
combinations.)
1, 0 = fatal error. Do not retry. Discard the unit.
1, 1 = programmed successfully. No further adjustments
possible.
X
DATA BYTE
FUSE
REG.
2
D4
C device address bit. Allows maximum of two
A
D3
DECODER
X
D2
X
DD_OTP
DD
D1
D5
can be 2.7 V to 5.5 V. Therefore, a
D0
between 4.75 V and 5.25 V to
DATA BYTE
D4
A
D3
B
A
W
P
D2
D1
D0
AD5273
A
P

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