AD5323ARUZ Analog Devices Inc, AD5323ARUZ Datasheet - Page 4

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AD5323ARUZ

Manufacturer Part Number
AD5323ARUZ
Description
IC,D/A CONVERTER,DUAL,12-BIT,CMOS,TSSOP,16PIN
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5323ARUZ

Settling Time
8µs
Number Of Bits
12
Data Interface
Serial
Number Of Converters
2
Voltage Supply Source
Single Supply
Power Dissipation (max)
2.5mW
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP
Number Of Channels
2
Resolution
12b
Conversion Rate
125KSPS
Interface Type
SER 3W SPI QSPI UW
Single Supply Voltage (typ)
3.3/5V
Dual Supply Voltage (typ)
Not RequiredV
Architecture
Resistor-String
Power Supply Requirement
Single
Output Type
Voltage
Single Supply Voltage (min)
2.5V
Single Supply Voltage (max)
5.5V
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
16
Package Type
TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD5303/AD5313/AD5323
Parameter
LOGIC INPUTS
LOGIC OUTPUT (SDO)
POWER REQUIREMENTS
1
2
3
4
5
6
Temperature range for Version A, Version B: −40°C to +105°C.
See the Terminology section.
DC specifications tested with the outputs unloaded.
Linearity is tested using a reduced code range: AD5303 (Code 8 to Code 248); AD5313 (Code 28 to Code 995); AD5323 (Code 115 to Code 3981).
Guaranteed by design and characterization, not production tested.
In order for the amplifier output to reach its minimum voltage, offset error must be negative. In order for the amplifier output to reach its maximum voltage, V
and offset plus gain error must be positive.
Input Current
Input Low Voltage, V
Input High Voltage, V
Pin Capacitance
V
V
Floating-State Leakage Current
Floating-State Output
Capacitance
V
I
I
DD
DD
DD
DD
DD
Output Low Voltage
Output High Voltage
Output Low Voltage
Output High Voltage
V
V
V
V
(Normal Mode)
(Full Power-Down)
= 5 V ± 10%
= 3 V ± 10%
DD
DD
DD
DD
= 4.5 V to 5.5 V
= 2.5 V to 3.6 V
= 4.5 V to 5.5 V
= 2.5 V to 3.6 V
2
5
5
IL
IH
Min
2.4
2.1
2.0
4.0
2.4
2.5
Typ
2
3
300
230
0.2
0.05
A Version
1
Max
±1
0.8
0.6
0.5
3.5
0.4
0.4
1
5.5
450
350
1
1
Min
2.4
2.1
2.0
4.0
2.4
2.5
Rev. B | Page 4 of 28
Typ
2
3
300
230
0.2
0.05
B Version
1
Max
±1
0.8
0.6
0.5
3.5
0.4
0.4
1
5.5
450
350
1
1
Unit
μA
V
V
V
V
V
V
pF
V
V
V
V
μA
pF
V
μA
μA
μA
μA
Conditions/Comments
V
V
V
V
V
V
I
I
I
I
DCEN = GND
DCEN = GND
I
Both DACs active and excluding load
currents
Both DACs in unbuffered mode;
V
mode, extra current is typically x μA
per DAC, where x = 5 μA + V
SINK
SOURCE
SINK
SOURCE
DD
DD
DD
DD
DD
DD
DD
IH
specification is valid for all DAC codes
= V
= 5 V ± 10%
= 3 V ± 10%
= 2.5 V
= 5 V ± 10%
= 3 V ± 10%
= 2.5 V
= 2 mA
= 2 mA
= 2 mA
= 2 mA
DD
and V
IL
= GND; in buffered
REF
/R
DAC
REF
= V
DD

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