ADSP-21992BSTZ Analog Devices Inc, ADSP-21992BSTZ Datasheet - Page 20

Mixed Signal DSP W/32K DM RAM& 16K PMRAM

ADSP-21992BSTZ

Manufacturer Part Number
ADSP-21992BSTZ
Description
Mixed Signal DSP W/32K DM RAM& 16K PMRAM
Manufacturer
Analog Devices Inc
Series
ADSP-21xxr
Type
Fixed Pointr
Datasheet

Specifications of ADSP-21992BSTZ

Interface
SPI, SSP
Clock Rate
160MHz
Non-volatile Memory
External
On-chip Ram
128kB
Voltage - I/o
3.30V
Voltage - Core
2.50V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
176-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADSP-21992BSTZ
Manufacturer:
AD
Quantity:
430
Part Number:
ADSP-21992BSTZ
Manufacturer:
Analog Devices Inc
Quantity:
10 000
ADSP-21992
SPECIFICATIONS
Specifications subject to change without notice.
OPERATING CONDITIONS
Table 5. Recommended Operating Conditions—ADSP-21992BBC
1
2
3
4
Table 6. Recommended Operating Conditions—ADSP-21992YBC
1
2
3
4
Parameter
V
V
AVDD
CCLK
HCLK
CLKIN
T
T
Parameter
V
V
AVDD
CCLK
HCLK
CLKIN
T
T
The HCLK frequency may be made to appear at the dedicated CLKOUT pin of the device. For low power operation, however, the CLKOUT pin can be disabled.
The peripherals operate at the HCLK rate, which may be selected to be equal to CCLK or CCLK 2, up to a maximum of a 75 MHz HCLK for the ADSP-21992BBC.
In order to attain the correct CCLK and HCLK values, the input clock frequency or crystal frequency depends on the internal operation of the clock generation PLL
The maximum junction temperature is limited to 140°C in order to meet all of the electrical specifications. It is ultimately the responsibility of the user to ensure that
The HCLK frequency may be made to appear at the dedicated CLKOUT pin of the device. For low power operation, however, the CLKOUT pin can be disabled.
The peripherals operate at the HCLK rate, which may be selected to be equal to CCLK or CCLK
In order to attain the correct CCLK and HCLK values, the input clock frequency or crystal frequency depends on the internal operation of the clock generation PLL
The maximum junction temperature is limited to 140°C in order to meet all of the electrical specifications. It is ultimately the responsibility of the user to ensure that
JUNC
AMB
circuit and the associated frequency ratio.
the power dissipation of the ADSP-21992 (including all dc and ac loads) is such that the maximum junction temperature limit of 140°C is not exceeded.
JUNC
AMB
circuit and the associated frequency ratio.
the power dissipation of the ADSP-21992 (including all dc and ac loads) is such that the maximum junction temperature limit of 140°C is not exceeded.
DDINT
DDEXT
DDINT
DDEXT
4
4
1
1, 2
3
3
,
2
Conditions
Internal (Core) Supply Voltage
External (I/O) Supply Voltage
Analog Supply Voltage
DSP Instruction Rate, Core Clock
Peripheral Clock Rate
Input Clock Frequency
Silicon Junction Temperature
Ambient Operating Temperature
Conditions
Internal (Core) Supply Voltage
External (I/O) Supply Voltage
Analog Supply Voltage
DSP Instruction Rate, Core Clock
Peripheral Clock Rate
Input Clock Frequency
Silicon Junction Temperature
Ambient Operating Temperature
Rev. A | Page 20 of 60 | August 2007
Min
2.375
3.135
2.375
0
0
0
–40
Min
2.375
3.135
2.375
0
0
0
–40
2, up to a maximum of an 75 MHz HCLK for the ADSP-21992YBC.
Typ
2.5
3.3
2.5
Typ
2.5
3.3
2.5
Max
2.625
3.465
2.625
150
75
150
+85
Max
2.625
3.465
2.625
150
75
150
+125
140
140
Unit
V
V
V
MHz
MHz
MHz
Unit
V
V
V
MHz
MHz
MHz
C
C
C
C

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