CY7C1470V33-167AXI Cypress Semiconductor Corp, CY7C1470V33-167AXI Datasheet - Page 12

• Manufacturer Part Number: CY7C1470V33-167AXI
• Description: CY7C1470V33-167AXI
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1470V33-167AXI

• Format - Memory: RAM
• Memory Type: SRAM - Synchronous
• Memory Size: 72M (2M x 36)
• Speed: 167MHz
• Interface: Parallel
• Voltage - Supply: 3.135 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Density: 72Mb
• Access Time (max): 3.4ns
• Sync/async: Synchronous
• Architecture: SDR
• Clock Freq (max): 167MHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 21b
• Package Type: TQFP
• Operating Temp Range: -40C to 85C
• Number Of Ports: 4
• Supply Current: 450mA
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Word Size: 36b
• Number Of Words: 2M
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Partial Write Cycle Description
The partial write cycle description for parts CY7C1470V33/CY7C1472V33/CY7C1474V33 is as follows.
Document Number: 38-05289 Rev. *M
Read
Write – no bytes written
Write byte a – (DQ
Write byte b – (DQ
Write bytes b, a
Write byte c – (DQ
Write bytes c, a
Write bytes c, b
Write bytes c, b, a
Write byte d – (DQ
Write bytes d, a
Write bytes d, b
Write bytes d, b, a
Write bytes d, c
Write bytes d, c, a
Write bytes d, c, b
Write all bytes
Read
Write – no bytes written
Write byte a – (DQ
Write byte b – (DQ
Write both bytes
Read
Write – no bytes written
Write byte X − (DQ
Write all bytes
Notes
8. X = “Don't Care”, H = Logic HIGH, L = Logic LOW, CE stands for all chip enables active. BWx = 0 signifies at least one byte write select is active, BWx = valid
9. Write is defined by WE and BW
10. When a write cycle is detected, all I/Os are tristated, even during byte writes.
11. Table only lists a partial listing of the Byte Write combinations. Any combination of BW
signifies that the desired byte write selects are asserted, see Write Cycle Description table for details.
active.
Function (CY7C1470V33)
a
b
c
d
a
b
x
and DQP
and DQP
and DQP
and DQP
and DQP
and DQP
and DQP
Function (CY7C1472V33)
Function (CY7C1474V33)
[a:d]
c
a
d
a
b
x)
b
)
)
)
)
)
)
. See Write Cycle Description table for details.
WE
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
[a:d]
BW
is valid. Appropriate write will be done based on which Byte Write is
X
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
d
WE
H
L
L
L
L
WE
BW
H
L
L
L
H
H
H
H
H
H
H
H
X
L
L
L
L
L
L
L
L
c
BW
H
H
x
L
L
b
BW
[8, 9, 10, 11]
X
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
b
CY7C1470V33
CY7C1472V33
CY7C1474V33
All BW = L
BW
BW
H
H
H
x
L
L
x
L
Page 12 of 33
BW
a
x
X
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
a
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