DSPIC33EP512MU810T-I/PT Microchip Technology, DSPIC33EP512MU810T-I/PT Datasheet - Page 362

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DSPIC33EP512MU810T-I/PT

Manufacturer Part Number
DSPIC33EP512MU810T-I/PT
Description
100 PINS, 512KB Flash, 52KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 100 TQFP 12x12x1mm T
Manufacturer
Microchip Technology
Series
dsPIC™ 33EPr
Datasheet

Specifications of DSPIC33EP512MU810T-I/PT

Core Processor
dsPIC
Core Size
16-Bit
Speed
60 MIPs
Connectivity
CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
Number Of I /o
83
Program Memory Size
512KB (170K x 24)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
24K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33EP512MU810T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
REGISTER 22-6:
DS70616E-page 362
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R-x, HSC
JSTATE
U-0
Unimplemented: Read as ‘0’
JSTATE: Live Differential Receiver J State Flag bit
1 = J state (differential ‘0’ in low-speed, differential ‘1’ in full-speed) detected on the USB
0 = No J state detected
SE0: Live Single-Ended Zero Flag bit
1 = Single-ended zero active on the USB bus
0 = No single-ended zero detected
TOKBUSY: Token Busy Status bit
1 = Token being executed by the USB module in On-The-Go state
0 = No token being executed
USBRST: Module Reset bit
1 = USB Reset has been generated; for Software Reset, application must set this bit for 50 ms, and
0 = USB Reset terminated
HOSTEN: Host Mode Enable bit
1 = USB host capability enabled; pull-downs on D+ and D- are activated in hardware
0 = USB host capability disabled
RESUME: Resume Signaling Enable bit
1 = Resume signaling activated; software must set bit for 10 ms, and then clear to enable remote
0 = Resume signaling disabled
PPBRST: Ping-Pong Buffers Reset bit
1 = Reset all Ping-Pong Buffer Pointers to the EVEN buffer descriptor banks
0 = Ping-Pong Buffer Pointers not reset
SOFEN: Start of Frame Enable bit
1 = Start of Frame token sent every one 1 ms
0 = Start of Frame token disabled
R-x, HSC
SE0
then clear it
wake-up
U-0
UxCON: USB CONTROL REGISTER (HOST MODE)
U = Unimplemented bit, read as ‘0’
W = Writable bit
‘1’ = Bit is set
TOKBUSY
R/W-0
U-0
USBRST
R/W-0
U-0
Preliminary
HSC = Hardware Settable/Clearable bit
‘0’ = Bit is cleared
HOSTEN
R/W-0
U-0
RESUME
R/W-0
U-0
 2009-2011 Microchip Technology Inc.
x = Bit is unknown
PPBRST
R/W-0
U-0
SOFEN
R/W-0
U-0
bit 8
bit 0

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