EP20K1000EFC672-2X Altera, EP20K1000EFC672-2X Datasheet - Page 28

APEX 20KE

EP20K1000EFC672-2X

Manufacturer Part Number
EP20K1000EFC672-2X
Description
APEX 20KE
Manufacturer
Altera
Datasheet

Specifications of EP20K1000EFC672-2X

Family Name
APEX 20K
Number Of Usable Gates
1000000
Number Of Logic Blocks/elements
38400
# Registers
160
# I/os (max)
508
Frequency (max)
350MHz
Process Technology
SRAM
Operating Supply Voltage (typ)
1.8V
Logic Cells
38400
Ram Bits
327680
Device System Gates
1772000
Operating Supply Voltage (min)
1.71V
Operating Supply Voltage (max)
1.89V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
672
Package Type
FC-FBGA
Lead Free Status / Rohs Status
Not Compliant

Available stocks

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Quantity
Price
Part Number:
EP20K1000EFC672-2X
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Quantity:
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Part Number:
EP20K1000EFC672-2X
Manufacturer:
ALTERA
0
APEX 20K Programmable Logic Device Family Data Sheet
Figure 15. ESB Product-Term Mode Control Logic
Note to
(1)
28
APEX 20KE devices have four dedicated clocks.
Figure
Local
Interconnect
Local
Interconnect
Local
Interconnect
Local
Interconnect
15:
Dedicated
Clocks
Global
Signals
The programmable register also supports an asynchronous clear function.
Within the ESB, two asynchronous clears are generated from global
signals and the local interconnect. Each macrocell can either choose
between the two asynchronous clear signals or choose to not be cleared.
Either of the two clear signals can be inverted within the ESB.
shows the ESB control logic when implementing product-terms.
Parallel Expanders
Parallel expanders are unused product terms that can be allocated to a
neighboring macrocell to implement fast, complex logic functions.
Parallel expanders allow up to 32 product terms to feed the macrocell OR
logic directly, with two product terms provided by the macrocell and 30
parallel expanders provided by the neighboring macrocells in the ESB.
The Quartus II software Compiler can allocate up to 15 sets of up to two
parallel expanders per set to the macrocells automatically. Each set of two
parallel expanders incurs a small, incremental timing delay.
shows the APEX 20K parallel expanders.
2 or 4 (1)
4
CLK2
CLKENA2
CLK1
CLKENA1 CLR2
Altera Corporation
CLR1
Figure 16
Figure 15

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